CS5534-BSZ Cirrus Logic Inc, CS5534-BSZ Datasheet - Page 21

IC ADC 24BIT 4CH W/LNA 20SSOP

CS5534-BSZ

Manufacturer Part Number
CS5534-BSZ
Description
IC ADC 24BIT 4CH W/LNA 20SSOP
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS5534-BSZ

Number Of Converters
1
Package / Case
24-SSOP
Number Of Bits
24
Sampling Rate (per Second)
3.84k
Data Interface
Serial
Power Dissipation (max)
45mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
4
Architecture
Delta-Sigma
Conversion Rate
6.25 SPs to 3840 SPs
Resolution
24 bit
Input Type
Voltage
Interface Type
Serial (3-Wire)
Voltage Reference
2.5 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1016 - EVAL BOARD FOR CS5534
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1116-5

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PERFORM CALIBRATION
SYNC1
SYNC0
NULL
DS289F5
D7(MSB)
D7(MSB)
D7(MSB)
D7(MSB)
Function:
CSRP [2:0] (Channel Setup Register Pointer Bits)
CC [2:0] (Calibration Control Bits)
Function:
Function:
Function:
1
1
1
0
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
D6
D6
D6
D6
These commands instruct the ADC to perform a calibration on the physical input channel se-
lected by the setup register which is chosen by the command byte pointer bits (CSRP2 -
CSRP0).
Setup 1 (All devices)
Setup 2 (All devices)
Setup 3 (All devices)
Setup 4 (All devices)
Setup 5 (All devices)
Setup 6 (All devices)
Setup 7 (All devices)
Setup 8 (All devices)
Reserved
Self-Offset Calibration
Self-Gain Calibration
Reserved
Reserved
System-Offset Calibration
System-Gain Calibration
Reserved
Part of the serial port re-initialization sequence.
End of the serial port re-initialization sequence.
This command is used to clear a port flag and keep the converter in the continuous conversion mode.
0
1
1
0
CSRP2
D5
D5
D5
D5
1
1
0
CSRP1
D4
D4
D4
D4
1
1
0
CSRP0
D3
D3
D3
D3
1
1
0
CC2
D2
D2
D2
D2
1
1
0
CS5531/32/33/34-AS
CC1
D1
D1
D1
D1
1
1
0
CC0
D0
D0
D0
D0
1
0
0
21

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