CS5381-KSZ Cirrus Logic Inc, CS5381-KSZ Datasheet - Page 3

IC ADC AUD 120DB 192KHZ 24-SOIC

CS5381-KSZ

Manufacturer Part Number
CS5381-KSZ
Description
IC ADC AUD 120DB 192KHZ 24-SOIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5381-KSZ

Package / Case
24-SOIC (0.300", 7.50mm Width)
Number Of Converters
2
Number Of Bits
24
Sampling Rate (per Second)
216k
Data Interface
Serial
Power Dissipation (max)
445mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Conversion Rate
192 KSPS
Resolution
24 bit
Number Of Adc Inputs
2
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Power Consumption
260 mW
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1592 - REFERENCE DESIGN CS5381 AUD ADC598-1008 - BOARD EVAL FOR CS5381 192KHZ ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1091-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5381-KSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS5381-KSZR
Manufacturer:
RENESAS
Quantity:
21 000
Part Number:
CS5381-KSZR
0
DS563F2
LIST OF FIGURES
LIST OF TABLES
Figure 1. Single-Speed Mode Stopband Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2. Single-Speed Mode Transition Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Single-Speed Mode Transition Band (Detail). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Single-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Double-Speed Mode Stopband Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6. Double-Speed Mode Transition Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 7. Double-Speed Mode Transition Band (Detail) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Double-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 9. Quad-Speed Mode Stopband Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 10. Quad-Speed Mode Transition Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 11. Quad-Speed Mode Transition Band (Detail) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 12. Quad-Speed Mode Passband Ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 13. Master Mode, Left-Justified SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 14. Slave Mode, Left-Justified SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 15. Master Mode, I²S SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 16. Slave Mode, I²S SAI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 17. OVFL Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 18. Left-Justified Serial Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 19. I²S Serial Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 20. OVFL Output Timing, I²S Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 21. OVFL Output Timing, Left-Justified Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 22. Typical Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. CS5381 Master Mode Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Recommended Analog Input Buffer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. CS5381 THD + N versus Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 1. CS5381 Mode Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 2. CS5381 Common Master Clock Frequencies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 3. CS5381 Slave Mode Clock Ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CS5381
3

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