AD9246BCPZ-125 Analog Devices Inc, AD9246BCPZ-125 Datasheet - Page 26

IC ADC 14BIT 125MSPS 48-LFCSP

AD9246BCPZ-125

Manufacturer Part Number
AD9246BCPZ-125
Description
IC ADC 14BIT 125MSPS 48-LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9246BCPZ-125

Data Interface
Serial, SPI™
Design Resources
Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002) Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051)
Number Of Bits
14
Sampling Rate (per Second)
125M
Number Of Converters
3
Power Dissipation (max)
425mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Resolution (bits)
14bit
Sampling Rate
125MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9246-125EBZ - BOARD EVAL FOR 125MSPS AD9246AD9246-105EBZ - BOARD EVAL FOR 105MSPS AD9246
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9246BCPZ-125
Manufacturer:
ADI
Quantity:
222
AD9246
Addr.
(Hex)
Flexible ADC Functions
10
0D
14
16
18
1
External output enable (OEB) pin must be high.
Parameter Name
offset
test_io
output_mode
output_phase
VREF
Bit 7
(MSB)
Output Driver
Configuration
00 for DRVDD = 2.5 V to
3.3 V (Default)
10 for DRVDD = 1.8 V
Output Clock
Polarity
1 = inverted
0 = normal
(Default)
Internal Reference
Resistor Divider
00—VREF = 1.25 V
01—VREF = 1.5 V
10—VREF = 1.75 V
11—VREF = 2.00 V
(Default)
Bit 6
Open
Bit 5
Digital Offset Adjust<5:0>
011111
011110
011101
000010
000001
000000
111111
111110
111101
...
100001
100000
PN23
0 =
normal
(Default)
1 = reset
Open
Open
Open
Rev. A | Page 26 of 44
PN9
0 =
normal
(Default)
1 =
reset
Output
Disable
1—
disabled
0—
enabled
Open
Open
Bit 4
1
Bit 3
Open
Open
Open
Global Output Test Options
000—off (Default)
001—midscale short
010—+FS short
011—−FS short
100—checker board output
101—PN 23 sequence
110—PN 9
111—one/zero word toggle
Output
Data
Invert
1 =
invert
Open
Open
Bit 2
Offset in LSBs
+31
+30
+29
+2
+1
0 (Default)
1
−2
−3
−31
−32
Data Format Select
00—offset binary
(default)
01—twos
complement
10—Gray Code
Open
Open
Bit 1
Bit 0
(LSB)
Open
Open
Default
Value
(Hex)
0x00
0x00
0x00
0x00
0xC0
Default Notes/
Comments
Adjustable for
offset inherent
in the converter.
See the
Accessible
Features
section.
See the
Interfacing to
High Speed
ADCs via SPI
User
Configures the
outputs and
the format of
the data.
See the
Accessible
Features
section.
See the
Accessible
Features
section.
Manual.
SPI-
SPI-
SPI-

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