AD9446BSVZ-100 Analog Devices Inc, AD9446BSVZ-100 Datasheet

IC ADC 16BIT 100MSPS 100-TQFP

AD9446BSVZ-100

Manufacturer Part Number
AD9446BSVZ-100
Description
IC ADC 16BIT 100MSPS 100-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9446BSVZ-100

Data Interface
Parallel
Number Of Bits
16
Sampling Rate (per Second)
100M
Number Of Converters
1
Power Dissipation (max)
2.8W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad
Resolution (bits)
16bit
Sampling Rate
100MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Digital
3V To 3.6V
Supply Current
368mA
Number Of Elements
1
Resolution
16Bit
Architecture
Pipelined
Sample Rate
100MSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±1/±1.6V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.14/4.75V
Single Supply Voltage (max)
3.46/5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
2.8W
Differential Linearity Error
±0.85LSB
Integral Nonlinearity Error
±6LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP EP
Input Signal Type
Differential
Package
100TQFP EP
Number Of Analog Inputs
1
Digital Interface Type
Parallel
Signal To Noise Ratio
79.7(Typ) dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9446-80LVDS/PCBZ - BOARD EVALUATION AD9446-80
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
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Manufacturer
Quantity
Price
Part Number:
AD9446BSVZ-100
Manufacturer:
AD
Quantity:
138
Part Number:
AD9446BSVZ-100
Manufacturer:
ADI
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Part Number:
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FEATURES
100 MSPS guaranteed sampling rate (AD9446-100)
83.6 dBFS SNR with 30 MHz input (3.8 V p-p input, 80 MSPS)
82.6 dBFS SNR with 30 MHz input (3.2 V p-p input, 80 MSPS)
89 dBc SFDR with 30 MHz input (3.2 V p-p input, 80 MSPS)
95 dBFS 2-tone SFDR with 9.8 MHz and 10.8 MHz (100 MSPS)
60 fsec rms jitter
Excellent linearity
2.0 V p-p to 4.0 V p-p differential full-scale input
Buffered analog inputs
LVDS outputs (ANSI-644 compatible) or CMOS outputs
Data format select (offset binary or twos complement)
Output clock available
3.3 V and 5 V supply operation
APPLICATIONS
MRI receivers
Multicarrier, multimode cellular receivers
Antenna array positioning
Power amplifier linearization
Broadband wireless
Radar
Infrared imaging
Communications instrumentation
GENERAL DESCRIPTION
The AD9446 is a 16-bit, monolithic, sampling analog-to-digital
converter (ADC) with an on-chip track-and-hold circuit. It is
optimized for performance, small size, and ease of use. The
product operates up to a 100 MSPS, providing superior SNR for
instrumentation, medical imaging, and radar receivers
employing baseband (<100 MHz) IF frequencies.
The ADC requires 3.3 V and 5.0 V power supplies and a low
voltage differential input clock for full performance operation.
No external reference or driver components are required for
many applications. Data outputs are CMOS or LVDS
compatible (ANSI-644 compatible) and include the means to
reduce the overall current needed for short trace distances.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
DNL = ±0.4 LSB typical
INL = ±3.0 LSB typical
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
Optional features allow users to implement various selectable
operating conditions, including input range, data format select,
and output data mode.
The AD9446 is available in a Pb-free, 100-lead, surface-mount,
plastic package (100-lead TQFP/EP) specified over the
industrial temperature range −40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
CLK+
CLK–
VIN+
VIN–
True 16-bit linearity.
High performance: outstanding SNR performance for
baseband IFs in data acquisition, instrumentation,
magnetic resonance imaging, and radar receivers.
Ease of use: on-chip reference and high input impedance
track-and-hold with adjustable analog input range and an
output clock simplifies data capture.
Packaged in a Pb-free, 100-lead TQFP/EP package.
Clock duty cycle stabilizer (DCS) maintains overall ADC
performance over a wide range of clock pulse widths.
OR (out-of-range) outputs indicate when the signal is
beyond the selected input range.
AD9446
BUFFER
MANAGEMENT
AND TIMING
16-Bit, 80/100 MSPS ADC
CLOCK
FUNCTIONAL BLOCK DIAGRAM
AGND
T/H
AVDD1 AVDD2
© 2005 Analog Devices, Inc. All rights reserved.
VREF
PIPELINE
REF
ADC
Figure 1.
SENSE REFT
DRGND DRVDD
16
STAGING
OUTPUT
CMOS
LVDS
REFB
OR
32
2
2
AD9446
www.analog.com
OUTPUT MODE
OR
D15 TO D0
DCO
DFS
DCS MODE

Related parts for AD9446BSVZ-100

AD9446BSVZ-100 Summary of contents

Page 1

FEATURES 100 MSPS guaranteed sampling rate (AD9446-100) 83.6 dBFS SNR with 30 MHz input (3.8 V p-p input, 80 MSPS) 82.6 dBFS SNR with 30 MHz input (3.2 V p-p input, 80 MSPS) 89 dBc SFDR with 30 MHz input ...

Page 2

AD9446 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 DC Specifications ......................................................................... 3 AC Specifications.......................................................................... 4 Digital Specifications ................................................................... 6 Switching ...

Page 3

... Full 335 365 Full 204 234 Full 68 75 Full 14 Full 1 Full 0.2 Full 2.4 2.6 Full 2.2 Rev Page AD9446 AD9446BSVZ-100 Min Typ Max Unit 16 Bits Guaranteed −5 ±0 −3 ±0 FSR −2 ±0 FSR −0.85 ±0.4 +0.85 LSB − ...

Page 4

... Rev Page AD9446BSVZ-100 Min Typ Max Unit 78.4 79.7 dB 78.3 79.5 dB 77.9 dB 77.7 79.0 dB 77.6 dB 78.9 dB 78 ...

Page 5

... Full 325 Rev Page AD9446 AD9446BSVZ-100 Min Typ Max Unit 82 92 dBc 82 89 dBc 79 dBc 81 89 dBc 77 dBc 84 dBc 83 dBc 74 dBc 94 ...

Page 6

... Max Min Typ 2.0 0.8 200 +10 − 3.25 0.2 545 247 1.375 1.125 0.2 1.5 1.6 1.3 1.5 1.4 1.7 1.1 1 AD9446BSVZ-80 AD9446BSVZ-100 Typ Max Min Typ 100 1 10 4.0 4.0 3.35 3.35 3.6 4.8 2.3 3 Max Unit V 0.8 V 200 μA +10 μ ...

Page 7

TIMING DIAGRAMS N – CLKL t CLKH CLK+ CLK– DATA OUT DCO+ DCO– t CPD N N – 1 VIN t CLKL t CLKH CLK– CLK DCO+ DCO– ...

Page 8

AD9446 ABSOLUTE MAXIMUM RATINGS Table 5. With Respect to Parameter ELECTRICAL AVDD1 AGND AVDD2 AGND DRVDD DGND AGND DGND AVDD1 DRVDD AVDD2 DRVDD AVDD2 AVDD1 D0± to D15± DGND CLK+/CLK− AGND OUTPUT MODE, AGND DCS MODE, DFS VIN+, VIN− AGND ...

Page 9

TERMINOLOGY Analog Bandwidth (Full Power Bandwidth) The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay ( The delay between the 50% ...

Page 10

AD9446 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS DCS MODE 1 DNC 2 OUTPUT MODE 3 DFS 4 LVDS_BIAS 5 AVDD1 6 SENSE 7 VREF 8 AGND 9 REFT 10 REFB 11 AVDD2 12 AVDD2 13 AVDD2 14 AVDD2 15 AVDD2 16 ...

Page 11

Table 7. Pin Function Descriptions—100-Lead TQFP/EP in LVDS Mode Pin No. Mnemonic 1 DCS MODE 2 DNC 3 OUTPUT MODE 4 DFS 5 LVDS_BIAS 20 34, 36, 38, AVDD1 ...

Page 12

AD9446 Pin No. Mnemonic 79 D12− 80 D12+ 81 D13− 82 D13+ 83 D14− 84 D14+ 85 D15− 86 D15+ (MSB) 89 OR− 90 OR+ Description D12 Complement Output Bit. D12 True Output Bit. D13 Complement Output Bit D13 True ...

Page 13

DCS MODE 1 PIN 1 DNC 2 OUTPUT MODE 3 DFS 4 LVDS_BIAS 5 AVDD1 ...

Page 14

AD9446 Table 8. Pin Function Descriptions—100-Lead TQFP/EP in CMOS Mode Pin No. Mnemonic 1 DCS MODE 62 66, 69, DNC 3 OUTPUT MODE 4 DFS 5 LVDS_BIAS 20 34, 36, ...

Page 15

EQUIVALENT CIRCUITS AVDD2 VIN+ 1k Ω 6pF 3. Ω AVDD2 VIN– 6pF Figure 6. Equivalent Analog Input Circuit DRVDD 1.2V LVDSBIAS 3.74k Ω Figure 7. Equivalent LVDS_BIAS Circuit DRVDD V DX– V Figure 8. Equivalent LVDS Digital Output ...

Page 16

AD9446 TYPICAL PERFORMANCE CHARACTERISTICS AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, rated sample rate, LVDS mode, DCS enabled, T input, AIN = −1dBFS, internal trimmed reference (nominal VREF = 1.6 V), unless otherwise noted. 0 ...

Page 17

SNR = 81.8dB –20 ENOB = 13.2BITS SFDR = 90dBc –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 12.5 25.0 FREQUENCY (MHz) Figure 18. AD9446-80 64k Point Single-Tone FFT/80 MSPS/10.3 ...

Page 18

AD9446 95 SFDR (dBc) –40°C SFDR (dBc) +25°C 90 SFDR (dBc) +85°C 85 SNR (dB) +25°C SNR (dB) –40°C 80 SNR (dB) +85° 100 ANALOG INPUT FREQUENCY (MHz) Figure 24. AD9446-100 SNR/SFDR vs. ...

Page 19

SFDR (dBc) +85°C SFDR (dBc) –40°C 90 SFDR (dBc) +25° SNR (dB) +85°C SNR (dB) +25° 100 ANALOG INPUT FREQUENCY (MHz) Figure 30. AD9446-80 SNR/SFDR vs. Analog Input ...

Page 20

AD9446 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 0 12.5 25.0 FREQUENCY (MHz) Figure 36. AD9446-100 64k Point Two-Tone FFT/100 MSPS/9.8 MHz, 10.8 MHz 0 –10 –20 –30 –40 SFDR dBc –50 ...

Page 21

OUTPUT CODE Figure 42. AD9446-100 Grounded Input Histogram 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 ...

Page 22

AD9446 95 93 10.3MHz SFDR dBc 30.3MHz SFDR dBc 70.3MHz SFDR dBc 79 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 ANALOG INPUT RANGE (V p-p) Figure 48. AD9446-100/SFDR vs. Analog Input Range, 100 ...

Page 23

SFDR dBc 95 80M SFDR dBc 90 85 80M SNR dB 80 100M SNR SAMPLE RATE (MSPS) Figure 54. AD9446 Single-Tone SNR/SFDR vs. Sample Rate 2.3 MHz 80 ...

Page 24

AD9446 THEORY OF OPERATION The AD9446 architecture is optimized for high speed and ease of use. The analog inputs drive an integrated, high bandwidth track-and-hold circuit that samples the signal prior to quantization by the 16-bit pipeline ADC core. The ...

Page 25

Table 9. Reference Configuration Summary Selected Mode SENSE Voltage External Reference AVDD Programmable Reference 0 VREF Programmable Reference 0 VREF (Set for 2 V p-p) Programmable Reference 0 VREF (Set for 2 V p-p) ...

Page 26

AD9446 ADT1–1WT R S ANALOG INPUT R SIGNAL 0.1 μF Figure 58. Transformer-Coupled Analog Input Circuit CLOCK INPUT CONSIDERATIONS Any high speed ADC is extremely sensitive to the quality of the sampling clock provided by the user. ...

Page 27

POWER CONSIDERATIONS Care should be taken when selecting a power source. The use of linear dc supplies is highly recommended. Switching supplies tend to have radiated components that may be received by the AD9446. Each of the power supply pins ...

Page 28

AD9446 OPERATIONAL MODE SELECTION Data Format Select The data format select (DFS) pin of the AD9446 determines the coding format of the output data. This pin is 3.3 V CMOS compatible, with logic high (or AVDD1, 3.3 V) selecting twos ...

Page 29

EVALUATION BOARD Evaluation boards are offered to configure the AD9446 in either CMOS or LVDS mode only. This design represents a recom- mended configuration for using the device over a wide range of sampling rates and analog input frequencies. These ...

Page 30

AD9446 1 P1 XTALPWR 2 P2 EXTREF 3 P3 DRGND 4 P4 DRVDD 1 P1 GND 2 P2 VCC 3 P3 GND MTHOLE6 DRVDD D11_C/D6_Y H3 D11_T/D7_Y MTHOLE6 D12_C/D8_Y D12_T/D9_Y H1 D13_C/D10_Y MTHOLE6 D13_T/D11_Y GND D14_C/D12_Y ...

Page 31

CR1 CR2 Figure 62. AD9446 Evaluation Board Schematic (Continued) Rev Page AD9446 ...

Page 32

AD9446 BYPASS CAPACITORS VCC + C64 C43 10μF 0.1μF GND VCC C11 XX GND DRVDD + C65 C47 C23 10μF 0.1μF 0.1μF DRGND 5V + C56 C85 10μF 0.1μF GND 5V GND 5V GND C35 C32 C30 C28 C27 C90 ...

Page 33

Figure 64. AD9446 Evaluation Board Schematic (Continued) Rev Page AD9446 ...

Page 34

AD9446 Table 11. AD9446 Customer Evaluation Board Bill of Material Reference Item Qty. Designator 1 7 C4, C6, C33, C34, C87, C88, C89 2 44 C2, C3, C5, C7, C8, C9, C10, C11, C12, C15, C20, C21, C22, C23, C26, ...

Page 35

Reference Item Qty. Designator 1 30 E15 R1 R5, R7 H1, H2, H3 T1, T2 ...

Page 36

... SLUG. ATTACHING THE SLUG TO A GROUND PLANE WILL REDUCE THE JUNCTION TEMPERATURE OF THE DEVICE WHICH MAY BE BENEFICIAL IN HIGH TEMPERATURE ENVIRONMENTS. ORDERING GUIDE Model Temperature Range 1 AD9446BSVZ-80 –40°C to +85°C AD9446BSVZ-100 1 –40°C to +85°C AD9446-100LVDS/PCB AD9446-80LVDS/PCB Pb-free part. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05490– ...

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