MAX1228BEEP+ Maxim Integrated Products, MAX1228BEEP+ Datasheet
MAX1228BEEP+
Specifications of MAX1228BEEP+
Related parts for MAX1228BEEP+
MAX1228BEEP+ Summary of contents
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... Internal 4.096V Reference or External Differential Reference o 10MHz 3-Wire SPI/QSPI/MICROWIRE-Compatible Interface o Space-Saving 28-Pin 5mm x 5mm Thin QFN Package PART MAX1226BCEE+ MAX1226BEEE+ MAX1228BCEP+ MAX1228BEEP+ + Denotes a lead(Pb)-free/RoHS-compliant package Exposed pad (TQFN only). Connect to GND. Ordering Information continued at end of data sheet. 16 EOC 15 DOUT 14 DIN ...
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ADCs with FIFO, Temp Sensor, Internal Reference ABSOLUTE MAXIMUM RATINGS V to GND ..............................................................-0.3V to +6V DD CS, SCLK, DIN, EOC, DOUT to GND.........-0. AIN0–AIN13, REF-/AIN_, CNVST/AIN_, REF+ to GND.........................................-0. Maximum Current into Any ...
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ELECTRICAL CHARACTERISTICS (continued +5V ±5 300kHz SAMPLE SCLK Typical values are +25°C.) A PARAMETER SYMBOL CONVERSION RATE Power-Up Time Acquisition Time Conversion Time t External Clock Frequency Aperture Delay Aperture Jitter ...
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ADCs with FIFO, Temp Sensor, Internal Reference ELECTRICAL CHARACTERISTICS (continued +5V ±5 300kHz SAMPLE SCLK Typical values are +25°C.) A PARAMETER SYMBOL DIGITAL INPUTS (SCLK, DIN, CS, CNVST) Input ...
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TIMING CHARACTERISTICS (Figure 1) PARAMETER SYMBOL SCLK Clock Period SCLK Duty Cycle SCLK Fall to DOUT Transition CS Rise to DOUT Disable CS Fall to DOUT Enable DIN to SCLK Rise Setup SCLK Rise to DIN Hold CS Fal l ...
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ADCs with FIFO, Temp Sensor, Internal Reference (V = +5V +4.096V 4.8MHz REF SCLK SFDR vs. FREQUENCY 120 100 0 100 1000 FREQUENCY (kHz) SHUTDOWN ...
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V = +4.096V 4.8MHz REF SCLK INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE 4.051 4.050 4.049 4.048 4.047 -40 - TEMPERATURE (°C) GAIN ERROR vs. SUPPLY VOLTAGE 0.5 0 -0.5 -1.0 -1.5 ...
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ADCs with FIFO, Temp Sensor, Internal Reference MAX1230 MAX1230 MAX1228 MAX1226 TQFN QSOP 1, 17, — — 19, 25 2–12, 26, 1–14 — 27, 28 — — 1–10 — — — — — — 11 — ...
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CS t CSS0 SCLK DIN t DOE DOUT Figure 1. Detailed Serial-Interface Timing Diagram CS DIN SCLK CNVST AIN1 AIN2 AIN15 REF- REF+ Figure 2. Functional Diagram Detailed Description The MAX1226/MAX1228/MAX1230 are low-power, seri- al-output, multichannel ...
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ADCs with FIFO, Temp Sensor, Internal Reference Converter Operation The MAX1226/MAX1228/MAX1230 ADCs use a fully dif- ferential, successive-approximation register (SAR) con- version technique and an on-chip T/H block to convert temperature and voltage signals into a 12-bit digital ...
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REF AIN0-AIN15 DAC GND (SINGLE ENDED); AIN0, AIN2, AIN4…AIN14 CIN+ (DIFFERENTIAL) HOLD GND CIN- (SINGLE ENDED); AIN1, AIN3, AIN5…AIN15 HOLD (DIFFERENTIAL Figure 3. Equivalent Input Circuit appropriate bit of the bipolar or unipolar register. Unipolar mode sets ...
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ADCs with FIFO, Temp Sensor, Internal Reference Conversion Time Calculations The conversion time for each scan is based on a num- ber of different factors: conversion time per sample, samples per result, results per scan temperature ...
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Table 2. Conversion Register* BIT BIT FUNCTION NAME — 7 (MSB) Set select conversion register. CHSEL3 6 Analog input channel select. CHSEL2 5 Analog input channel select. CHSEL1 4 Analog input channel select. CHSEL0 3 Analog input ...
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ADCs with FIFO, Temp Sensor, Internal Reference Table 3. Setup Register* BIT NAME BIT — 7 (MSB) Set to zero to select setup register. — 6 Set select setup register. Clock mode and CNVST configuration. ...
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Write to the reset register (as shown in Table 7) to clear the FIFO or to reset all registers to their default states. Set the RESET bit reset the FIFO. Set the reset bit to zero to ...
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ADCs with FIFO, Temp Sensor, Internal Reference Table 6. Averaging Register* BIT NAME BIT — 7 (MSB) Set to zero to select averaging register. — 6 Set to zero to select averaging register. — 5 Set to 1 ...
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Internally Timed Acquisitions and Conversions Using CNVST Performing Conversions in Clock Mode 00 In clock mode 00, the wake up, acquisition, conversion, and shutdown sequences are initiated through CNVST and performed automatically using the internal oscilla- tor. Results are added ...
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ADCs with FIFO, Temp Sensor, Internal Reference CNVST (ACQUISITION1) (ACQUISITION2) CS (CONVERSION1) SCLK DOUT EOC REQUEST MULTIPLE CONVERSIONS BY SETTING CNVST LOW FOR EACH CONVERSION. Figure 5. Clock Mode 01 (CONVERSION BYTE) DIN CS SCLK DOUT EOC THE ...
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DIN (ACQUISITION1) CS SCLK DOUT EOC EXTERNALLY TIMED ACQUISITION, SAMPLING AND CONVERSION WITHOUT CNVST. Figure 7. Clock Mode 11 Initiate a conversion by writing a byte to the conversion register followed by 16 SCLK cycles pulsed high ...
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ADCs with FIFO, Temp Sensor, Internal Reference OUTPUT CODE FULL-SCALE TRANSITION 111 110 101 011 010 00 . ...
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Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself. This is expressed as: ⎛ THD = 20 x log ...
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ADCs with FIFO, Temp Sensor, Internal Reference Ordering Information (continued) PART TEMP RANGE MAX1230BCEG+ 0°C to +70°C MAX1230BEEG+ -40°C to +85°C MAX1230BCTI+ 0°C to +70°C MAX1230BETI+ -40°C to +85°C + Denotes a lead(Pb)-free/RoHS-compliant package. Chip Information PROCESS: BiCMOS ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23 © 2010 Maxim Integrated Products ...