LTC2295IUP#PBF Linear Technology, LTC2295IUP#PBF Datasheet

IC ADC DUAL 14BIT 10MSPS 64QFN

LTC2295IUP#PBF

Manufacturer Part Number
LTC2295IUP#PBF
Description
IC ADC DUAL 14BIT 10MSPS 64QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2295IUP#PBF

Number Of Bits
14
Sampling Rate (per Second)
10M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
138mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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FEATURES
TYPICAL APPLICATIO
APPLICATIO S
ANALOG
ANALOG
INPUT A
INPUT B
CLK A
CLK B
Integrated Dual 14-Bit ADCs
Sample Rate: 10Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 120mW
74.4dB SNR
90dB SFDR
110dB Channel Isolation
Multiplexed or Separate Data Bus
Flexible Input: 1V
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm × 9mm) QFN Package
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
CLOCK/DUTY CYCLE
CLOCK/DUTY CYCLE
+
+
INPUT
INPUT
CONTROL
CONTROL
S/H
S/H
U
P-P
to 2V
PIPELINED
ADC CORE
PIPELINED
ADC CORE
14-BIT
14-BIT
P-P
Range
U
DRIVERS
DRIVERS
OUTPUT
OUTPUT
2295 TA01
DESCRIPTIO
OV
D13A
D0A
OGND
MUX
OV
D13B
D0B
OGND
The LTC
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2295 is perfect for
demanding imaging and communications applications
with AC performance that includes 74.4dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include ±1.2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1LSB
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
All other trademarks are the property of their respective owners.
• •
• •
DD
DD
, LTC and LT are registered trademarks of Linear Technology Corporation.
®
2295 is a 14-bit 10Msps, low power dual 3V
U
RMS
Low Power 3V ADC
–0.5
–1.0
–1.5
–2.0
2.0
1.5
1.0
0.5
Dual 14-Bit, 10Msps
0
Typical INL, 2V Range
.
0
4096
CODE
8192
LTC2295
12288
2295 G02
16384
2295fa
1

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LTC2295IUP#PBF Summary of contents

Page 1

... A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high perfor- mance at full speed for a wide range of clock duty cycles. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical INL, 2V Range OV 2 ...

Page 2

LTC2295 ABSOLUTE AXI U RATI (Notes Supply Voltage (V ) ................................................. 4V DD Digital Output Ground Voltage (OGND) ....... –0. Analog Input Voltage (Note 3) ..... –0.3V ...

Page 3

ALOG I PUT The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are 25°C. (Note 4) A SYMBOL PARAMETER + V Analog Input Range ( ...

Page 4

LTC2295 TER AL REFERE CE CHARACTERISTICS PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, ...

Page 5

W U POWER REQUIRE E TS range, otherwise specifications are at T SYMBOL PARAMETER V Analog Supply Voltage DD OV Output Supply Voltage DD IV Supply Current DD P Power Dissipation DISS P Shutdown Power (Each Channel) SHDN P Nap ...

Page 6

LTC2295 W U TYPICAL PERFOR A CE CHARACTERISTICS Crosstalk vs Input Frequency –100 –105 –110 –115 –120 –125 –130 100 INPUT FREQUENCY (MHz) 2295 G01 8192 Point FFT 5.1MHz, IN –1dB, 2V Range ...

Page 7

W U TYPICAL PERFOR A CE CHARACTERISTICS SNR and SFDR vs Sample Rate, 2V Range 5MHz, –1dB IN 100 SFDR 90 80 SNR SAMPLE RATE (Msps) 2295 G10 ...

Page 8

LTC2295 CTIO (Pin 1): Channel A Positive Differential Analog INA Input. – A (Pin 2): Channel A Negative Differential Analog INA Input. REFHA (Pins 3, 4): Channel A High Reference. Short together ...

Page 9

CTIO S SHDNA (Pin 59): Channel A Shutdown Mode Selection Pin. Connecting SHDNA to GND and OEA to GND results in normal operation with the outputs enabled. Connecting SHDNA to GND and OEA to V ...

Page 10

LTC2295 DIAGRA ANALOG N INPUT t H CLK – 5 D0-D13, OF ANALOG A INPUT A ANALOG B INPUT B t CLKA = CLKB = MUX A – ...

Page 11

U U APPLICATIO S I FOR ATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other ...

Page 12

LTC2295 U U APPLICATIO S I FOR ATIO applications, the analog inputs can be driven single-ended with slightly worse harmonic distortion. The CLK input is single-ended. The LTC2295 has two phases of operation, determined by the state of the CLK ...

Page 13

U U APPLICATIO S I FOR ATIO high to low, the inputs are reconnected to the sampling capacitors to acquire a new sample. Since the sampling capacitors still hold the previous sample, a charging glitch proportional to the change in ...

Page 14

LTC2295 U U APPLICATIO S I FOR ATIO Figure 4 demonstrates the use of a differential amplifier to convert a single ended input signal into a differential input signal. The advantage of this method is that it provides low frequency ...

Page 15

U U APPLICATIO S I FOR ATIO The difference amplifier generates the high and low refer- ence for the ADC. High speed switching circuits are connected to these outputs and they must be externally bypassed. Each output has two pins. ...

Page 16

LTC2295 U U APPLICATIO S I FOR ATIO Maximum and Minimum Conversion Rates The maximum conversion rate for the LTC2295 is 10Msps. For the ADC to operate properly, the CLK signal should have a 50% (±10%) duty cycle. Each half ...

Page 17

U U APPLICATIO S I FOR ATIO As with all high speed/high resolution converters, the digi- tal output loading can affect the performance. The digital outputs of the LTC2295 should drive a minimal capacitive load to avoid possible interaction between ...

Page 18

LTC2295 U U APPLICATIO S I FOR ATIO Digital Output Multiplexer The digital outputs of the LTC2295 can be multiplexed onto a single data bus. The MUX pin is a digital input that swaps the two data busses. If MUX ...

Page 19

U U APPLICATIO S I FOR ATIO W U LTC2295 2295fa 19 ...

Page 20

LTC2295 U U APPLICATIO S I FOR ATIO Silkscreen Top Top Side 2295fa ...

Page 21

U U APPLICATIO S I FOR ATIO W U Inner Layer 2 GND Inner Layer 3 Power LTC2295 2295fa 21 ...

Page 22

LTC2295 U U APPLICATIO S I FOR ATIO Bottom Side 2295fa ...

Page 23

... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 64-Lead Plastic QFN (9mm × ...

Page 24

... SNR, 9mm × 9mm QFN Package 150mW, 74.5dB SNR, 9mm × 9mm QFN Package 235mW, 74.4dB SNR, 9mm × 9mm QFN Package 400mW, 74.3dB SNR, 9mm × 9mm QFN Package www.linear.com ● 2295fa RD/LT 0106 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2004 ...

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