LTC2393CUK-16#PBF Linear Technology, LTC2393CUK-16#PBF Datasheet - Page 11

• Manufacturer Part Number: LTC2393CUK-16#PBF
• Description: IC ADC 16BIT SER/PAR 1M 48-QFN
• Manufacturer: Linear Technology

Specifications of LTC2393CUK-16#PBF

• Number Of Bits: 16
• Sampling Rate (per Second): 1M
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 175mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-WFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
OVERVIEW
The LTC2393-16 is a low noise, high speed 16-bit suc-
cessive approximation register (SAR) ADC. Operating
from a single 5V supply, the LTC2393-16 supports a
large ±4.096V fully differential input range, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2393-16 achieves ±2LSB INL max,
no missing codes at 16 bits and 94.2dB SNR (typ).
The LTC2393-16 includes a precision internal reference
with a guaranteed 0.5% initial accuracy and a ±20ppm/°C
(max) temperature coefficient. Fast 1Msps throughput with
no cycle latency in both parallel and serial interface modes
makes the LTC2393-16 ideally suited for a wide variety
of high speed applications. An internal oscillator sets the
conversion time, easing external timing considerations.
The LTC2393-16 dissipates only 140mW at 1Msps, while
both nap and sleep power-down modes are provided to
further reduce power during inactive periods.
CONVERTER OPERATION
The LTC2393-16 operates in two phases. During the ac-
quisition phase, the charge redistribution capacitor D/A
converter (CDAC) is connected to the IN
to sample the differential analog input voltage. A falling
edge on the CNVST pin initiates a conversion. During the
conversion phase, the 16-bit CDAC is sequenced through a
successive approximation algorithm, effectively comparing
the sampled input with binary-weighted fractions of the
reference voltage (e.g., V
using the differential comparator. At the end of conversion,
the CDAC output approximates the sampled analog input.
The ADC control logic then prepares the 16-bit digital
output code for parallel or serial transfer.
TRANSFER FUNCTION
The LTC2393-16 digitizes the full-scale voltage of 2 • V
into 2
= 4.096V. The ideal transfer function for two’s complement
is shown in Figure 2. The OB/2C pin selects either offset
binary or two’s complement format.
16
levels, resulting in an LSB size of 125μV when V
REF
/2, V
REF
/4 … V
+
and IN
REF
/65536)
–
pins
REF
REF
ANALOG INPUT
The analog inputs of the LTC2393-16 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent circuit
shown in Figure 3. The diodes at the input provide ESD pro-
tection. The analog inputs should not exceed the supply or
go below ground. In the acquisition phase, each input sees
approximately 40pF (C
with 50Ω (R
switch. Any unwanted signal that is common to both
inputs will be reduced by the common mode rejection of
the ADC. The inputs draw only one small current spike
while charging the C
During conversion, the analog inputs draw only a small
leakage current.
Figure 2. LTC2393-16 Two’s Complement Transfer Function
011...111
011...110
000...001
000...000
111...111
111...110
100...001
100...000
Figure 3. The Equivalent Circuit for the
Differential Analog Input of the LTC2393-16
IN
IN
+
–
IN
–FSR/2
) from the on-resistance of the sampling
AVP
AVP
IN
INPUT VOLTAGE (V)
IN
) from the sampling CDAC in series
BIPOLAR
capacitors during acquisition.
LSB
–1
R
R
ZERO
IN
IN
0V
FSR = +FS – –FS
1LSB = FSR/65536
C
C
LSB
IN
IN
1
LTC2393-16
239316 F03
FSR/2 – 1LSB
BIAS
VOLTAGE
239316 F02
11
239316f