MAX1401EAI+ Maxim Integrated Products, MAX1401EAI+ Datasheet - Page 30

• Manufacturer Part Number: MAX1401EAI+
• Description: IC ADC 18BIT LP 28-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1401EAI+

• Number Of Bits: 18
• Sampling Rate (per Second): 480
• Data Interface: QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 750µW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Number Of Adc Inputs: 5
• Architecture: Delta-Sigma
• Conversion Rate: 4.8 KSPs
• Resolution: 18 bit
• Input Type: Voltage
• Interface Type: Serial
• Voltage Reference: External
• Supply Voltage (max): 3 V
• Maximum Power Dissipation: 21.45 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Signal Type: Pseudo-Differential, Differential
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

input can be up to four-times the output data period.
For a synchronized step input (using the FSYNC func-
tion or the internal scanning logic), the settling time is
three-times the output data period.
The digital filter does not provide any rejection close to
the harmonics of the modulator sample frequency.
However, due to the high oversampling ratio of the
MAX1401, these bands occupy only a small fraction of
the spectrum, and most broadband noise is filtered.
Therefore, the analog filtering requirements in front of
the MAX1401 are considerably reduced compared to a
conventional converter with no on-chip filtering. In addi-
tion, because the part’s common-mode rejection of
90dB extends out to several kilohertz, common-mode
noise susceptibility in this frequency range is substan-
tially reduced.
Depending on the application, it may be necessary to
provide filtering prior to the MAX1401 to eliminate
unwanted frequencies the digital filter does not reject. It
may also be necessary in some applications to provide
additional filtering to ensure that differential noise sig-
nals outside the frequency band of interest do not satu-
rate the analog modulator.
If passive components are placed in front of the
MAX1401, when the part is used in unbuffered mode,
ensure that the source impedance is low enough not to
introduce gain errors in the system (Tables 13a–13d).
This can significantly limit the amount of passive anti-
aliasing filtering that can be applied in front of the
MAX1401 in unbuffered mode. However, when the part
is used in buffered mode, large source impedances will
simply result in a small DC offset error (a 1kΩ source
+3V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
Figure 11. Frequency Response of the SINC
50Hz)
30
______________________________________________________________________________________
-100
-120
-140
-160
-20
-40
-60
-80
0
0
20
40 60 80
FREQUENCY (Hz)
100 120 140 160 180 200
f
MF1, 0 = 0
FS1, 0 = 0
f
CLKIN
N
= 50Hz
Analog Filtering
= 2.4576MHz
3
Filter (Notch at
resistance will cause an offset error of less than 10µV).
Therefore, where any significant source impedances are
required, Maxim recommends operating the part in
buffered mode.
Two fully differential calibration channels allow mea-
surement of the system gain and offset errors. Connect
the CALOFF channel to 0V and the CALGAIN channel
to the reference voltage. Average several measure-
ments on both CALOFF and CALGAIN. Subtract the
average offset code and scale to correct for the gain
error. This linear calibration technique can be used to
remove errors due to source impedances on the analog
input (e.g., when using a simple RC anti-aliasing filter
on the front end).
Microprocessors with a hardware SPI (serial peripheral
interface) can use a 3-wire interface to the MAX1401
(Figure 12). The SPI hardware generates groups of
eight pulses on SCLK, shifting data in on one pin and
out on the other pin.
For best results, use a hardware interrupt to monitor the
INT pin and acquire new data as soon as it is available.
If hardware interrupts are not available, or if interrupt
latency is longer than the selected conversion rate, use
the FSYNC bit to prevent automatic measurement while
reading the data output register.
The example code in Listing 1 shows how to interface
with the MAX1401 using a 68HC11. System-dependent
initialization code is not shown.
Figure 12. MAX1401 to 68HC11 Interface
68HC11
SPI Interface (68HC11, PIC16C73)
INTERRUPT
Applications Information
MOSI
MISO
SCK
SS
V
DD
Calibration Channels
V
DD
RESET
SCLK
DOUT
DIN
CS
INT
MAX1401