LTC1196-2BCS8 Linear Technology, LTC1196-2BCS8 Datasheet - Page 11

• Manufacturer Part Number: LTC1196-2BCS8
• Description: IC A/DCONV 8BIT 1MHZ SAMPL 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1196-2BCS8

• Number Of Bits: 8
• Sampling Rate (per Second): 1M
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN FUNCTIONS
LTC1196
CS (Pin 1): Chip Select Input. A logic LOW on this input
enables the LTC1196. A logic HIGH on this input disables
the LTC1196.
IN
with respect to GND.
IN
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
V
the span of the A/D converter and must be kept free of
noise with respect to GND.
D
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
V
to the A/D converter. It must be kept free of noise and ripple
by bypassing directly to the analog ground plane.
TYPICAL PERFORMANCE CHARACTERISTICS
REF
CC
OUT
+
–
(Pin 2): Analog Input. This input must be free of noise
(Pin 3): Analog Input. This input must be free of noise
(Pin 8): Power Supply Voltage. This pin provides power
(Pin 5): Reference Input. The reference input defi nes
(Pin 6): Digital Data Output. The A/D conversion
100
80
60
40
20
0
1k
Output Amplitude
vs Input Frequency
10k
INPUT FREQUENCY (Hz)
100k
V
REF
V
REF
= V
= V
CC
1M
CC
= 5V
= 2.7V
1196/98 G34
10M
LTC1198
CS/SHUTDOWN (Pin 1): Chip Select Input. A logic LOW
on this input enables the LTC1198. A logic HIGH on this
input disables the LTC1198 and disconnects the power
to THE LTC1198.
CHO (Pin 2): Analog Input. This input must be free of
noise with respect to GND.
CH1 (Pin 3): Analog Input. This input must be free of noise
with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
D
shifted into this input.
D
result is shifted out of this output.
CLK (Pin 7): Shift Clock. This clock synchronizes the se-
rial data transfer.
V
age. This pin provides power and defi nes the span of the
A/D converter. It must be kept free of noise and ripple by
bypassing directly to the analog ground plane.
CC
IN
OUT
(Pin 5): Digital Data Input. The multiplexer address is
(V
(Pin 6): Digital Data Output. The A/D conversion
REF
70
60
50
40
30
20
10
0
) (Pin 8): Power Supply and Reference Volt-
1k
Spurious-Free Dynamic Range
vs Frequency
T
A
= 25°C
10k
LTC1196/LTC1198
FREQUENCY (Hz)
f
CLK
100k
V
CC
= 5MHz
= 3V
V
f
CLK
CC
1M
= 5V
= 12MHz
1196/98 G35
10M
11
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