LTC2436-1IGN#TRPBF Linear Technology, LTC2436-1IGN#TRPBF Datasheet - Page 18

• Manufacturer Part Number: LTC2436-1IGN#TRPBF
• Description: IC CONV A/D 16B 2CH DIFF 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC2436-1IGN#TRPBF

• Number Of Bits: 16
• Sampling Rate (per Second): 6.8
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
LTC2436-1
During the conversion, the SCK and the serial data output
pin (SDO) are HIGH (EOC = 1). Once the conversion is
complete, SCK and SDO go LOW (EOC = 0) indicating the
conversion has finished and the device has entered the
data output state. The data output cycle begins on the
first rising edge of SCK and ends after the 19th rising
edge. Data is shifted out the SDO pin on each falling edge
of SCK. The internally generated serial clock is output
to the SCK pin. This signal may be used to shift the
conversion result into external circuitry. EOC can be
latched on the first rising edge of SCK and the last bit of
the conversion result can be latched on the 19th rising
edge of SCK. After the 19th rising edge, SDO goes HIGH
(EOC = 1) indicating a new conversion is in progress. SCK
remains HIGH during the conversion.
PRESERVING THE CONVERTER ACCURACY
The LTC2436-1 is designed to reduce as much as possible
the conversion result sensitivity to device decoupling,
PCB layout, antialiasing circuits, line frequency perturba-
tions and so on. Nevertheless, in order to preserve the
accuracy capability of this part, some simple precautions
are desirable.
(INTERNAL)
18
SDO
SCK
CS
CONVERSION
U
U
BIT 18
EOC
CH0/CH1
BIT 17
W
Figure 11. Internal Serial Clock, Continuous Operation
ANALOG INPUT RANGE
–0.5V
BIT 16
SIG
REF
TO 0.5V
U
0.1V TO V
REFERENCE
VOLTAGE
BIT 15
MSB
1 F
2.7V TO 5.5V
REF
CC
1
2
3
4
5
6
7
BIT 14
V
REF
REF
CH0
CH0
CH1
CH1
CC
LTC2436-1
DATA OUTPUT
+
–
+
–
+
–
Digital Signal Levels
The LTC2436-1’s digital interface is easy to use. Its digital
inputs (F
accept standard TTL/CMOS logic levels and the internal
hysteresis receivers can tolerate edge rates as slow as
100 s. However, some considerations are required to take
advantage of the exceptional accuracy and low supply
current of this converter.
The digital output signals (SDO and SCK in Internal SCK
mode of operation) are less of a concern because they are
not generally active during the conversion state.
While a digital input signal is in the range 0.5V to
(V
current from the power supply. It should be noted that,
when any one of the digital input signals (F
in External SCK mode of operation) is within this range, the
LTC2436-1 power supply current may increase even if the
signal in question is at a valid logic level. For micropower
operation, it is recommended to drive all digital input
signals to full CMOS levels [V
(V
CC
CC
BIT 13
SDO
GND
SCK
CS
F
– 0.5V), the CMOS input receiver draws additional
– 0.4V)].
O
14
13
12
11
O
, CS and SCK in External SCK mode of operation)
8, 9, 10, 15, 16
2-WIRE
INTERFACE
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/SIMULTANEOUS
50Hz/60Hz REJECTION
BIT 2
BIT 1
IL
< 0.4V and V
LSB
BIT 0
O
, CS and SCK
CONVERSION
OH
24361f
24361 F11
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