LTC1196-1BCS8#PBF Linear Technology, LTC1196-1BCS8#PBF Datasheet - Page 25
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LTC1196-1BCS8#PBF
Manufacturer Part Number
LTC1196-1BCS8#PBF
Description
IC A/DCONV 8BIT 1MHZ SAMPL 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1196-2BCS8PBF.pdf
(28 pages)
Specifications of LTC1196-1BCS8#PBF
Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
Serial
Number Of Converters
1
Power Dissipation (max)
50mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
TYPICAL APPLICATIONS
The timing diagram of Figure 16 was obtained from the
circuit of Figure 15. The CLK was 5MHz for the timing
diagram and the TMS320C25 clock rate was 40MHz.
Figure 17 shows the timing diagram with the LTC1198
running off a 2.7V supply and 5MHz CLK.
D
D
CLK
OUT
CLK
D
OUT
D
CS
CS
Figure 16. Scope Trace the LTC1198 Running Off
5V Supply in the Circuit of Figure 15
Figure 17. Scope Trace the LTC1198 Running Off
1.7V Supply in the Circuit of Figure 15
IN
IN
NULL
NULL
BITS
BITS
HORIZONTAL: 1500ns/DIV
HORIZONTAL: 500ns/DIV
MSB
(B7)
MSB
(B7)
(B0)
LSB
(B0)
LSB
1196/98 F16
1196/98 F17
Software Description
The software confi gures and controls the serial port of
the TMS320C25.
The code fi rst sets up the interrupt and reset vectors. On
reset the TMS320C25 starts executing code at the label
INIT. Upon completion of a 16-bit data transfer, an inter-
rupt is generated and the DSP will begin executing code
at the label RINT.
In the beginning, the code initializes registers in the
TMS320C25 that will be used in the transfer routine. The
interrupts are temporarily disabled. The data memory page
pointer register is set to zero. The auxiliary register pointer
is loaded with one and auxiliary register one is loaded with
the value 200 hexadecimal. This is the data memory loca-
tion where the data from the LTC1198 will be stored. The
interrupt mask register (IMR) is confi gured to recognize
the RINT interrupt, which is generated after receiving the
last of 16 bits on the serial port. This interrupt is still dis-
abled at this time. The transmit framing synchronization
pin (FSX) is confi gured to be an output. The F0 bit of the
status register ST1, is initialized to zero which sets up the
serial port to operate in the 16-bit mode.
Next, the code in TXRX routine starts to transmit and
receive data. The DIN word is loaded into the ACC and
shifted left eight times so that it appears as in Figure 18.
This D
to CH1. The D
and the RINT interrupt is enabled. The NOP is repeated
3 times to mask out the interrupts and minimize the cycle
time of the conversion to be 20 clock cycles. All clocking
and CS functions are performed by the hardware.
IN
B15
0
Figure 18. D
Circuit in Figure 15
word confi gures the LTC1198 for CH0 with respect
START
1
IN
word is then put in the transmit register
IN
S/D
0
Word in ACC of TMS20C25 for the
LTC1196/LTC1198
O/S
0
DUMMY
0
DUMMY
1
0
L1196/98 F18
B8
0
25
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