LTC2420CS8 Linear Technology, LTC2420CS8 Datasheet - Page 13

IC ADC 20BIT MICRPWR W/OSC 8SOIC

LTC2420CS8

Manufacturer Part Number
LTC2420CS8
Description
IC ADC 20BIT MICRPWR W/OSC 8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2420CS8

Number Of Bits
20
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Q1156784

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the rising edge of the 24th SCK pulse. On the falling edge
of the 24th SCK pulse, SDO goes HIGH indicating a new
conversion cycle has been initiated. This bit serves as EOC
(Bit 23) for the next conversion cycle. Table 2 summarizes
the output data format.
As long as the voltage on the V
the – 0.3V to (V
range, a conversion result is generated for any input value
from – 0.125 • V
greater than 1.125 • V
to the value corresponding to 1.125 • V
voltages below – 0.125 • V
clamped to the value corresponding to – 0.125 • V
Frequency Rejection Selection (F
The LTC2420 internal oscillator provides better than 110dB
normal mode rejection at the line frequency and its har-
monics for 50Hz 2% or 60Hz 2%. For 60Hz rejection, F
(Pin 8) should be connected to GND (Pin 4) while for 50Hz
rejection the F
The selection of 50Hz or 60Hz rejection can also be made
by driving F
APPLICATIO S I FOR ATIO
Table 2. LTC2420 Output Data Format
Input Voltage
V
9/8 • V
V
V
3/4V
3/4V
1/2V
1/2V
1/4V
1/4V
0
–1LSB
–1/8 • V
V
*The sign bit changes state during the 0 code.
IN
REF
REF
+
IN
/0
> 9/8 • V
< –1/8 • V
REF
REF
REF
REF
REF
REF
+ 1LSB
REF
REF
+ 1LSB
+ 1LSB
+ 1LSB
O
O
to an appropriate logic level. A selection
REF
CC
REF
pin should be connected to V
REF
+ 0.3V) absolute maximum operating
U
REF
to 1.125 • V
Bit 23
, the conversion result is clamped
EOC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
U
REF
IN
, the conversion result is
Bit 22
DMY
pin is maintained within
REF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
O
W
Pin Connection)
. For input voltages
Bit 21
1/0*
SIG
REF
1
1
1
1
1
1
1
1
1
1
0
0
0
CC
. For input
U
(Pin 1).
Bit 20
EXR
REF
1
1
1
0
0
0
0
0
0
0
0
1
1
1
.
O
Bit 19
MSB
0
0
0
1
1
1
1
0
0
0
0
1
1
1
change during the sleep or data output states will not
disturb the converter operation. If the selection is made
during the conversion state, the result of the conversion in
progress may be outside specifications but the following
conversions will not be affected.
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2420 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the F
frequency f
2560Hz (1Hz notch frequency) to be detected. The exter-
nal clock signal duty cycle is not significant as long as the
minimum and maximum specifications for the high and
low periods t
While operating with an external conversion clock of a
frequency f
normal mode rejection in a frequency range f
function of the input frequency deviation from f
is shown in Figure 5.
4% and its harmonics. The normal mode rejection as a
Bit 18
0
0
0
1
1
0
0
1
1
0
0
1
1
1
EOSC
EOSC
Bit 17
HEO
O
0
0
0
1
0
1
0
1
0
1
0
1
1
1
pin and turns off the internal oscillator. The
, the LTC2420 provides better than 110dB
of the external signal must be at least
and t
Bit 16
LEO
1
1
0
1
0
1
0
1
0
1
0
1
0
0
are observed.
Bit 15
1
1
0
1
0
1
0
1
0
1
0
1
0
0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
LTC2420
EOSC
EOSC
Bit 0
LSB
1
1
0
1
0
1
0
1
0
1
0
1
0
0
13
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