LTC1286CS8#TR Linear Technology, LTC1286CS8#TR Datasheet - Page 18
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LTC1286CS8#TR
Manufacturer Part Number
LTC1286CS8#TR
Description
IC ADC 12BIT SAMPL MCRPWR 8SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1298CN8PBF.pdf
(24 pages)
Specifications of LTC1286CS8#TR
Number Of Bits
12
Sampling Rate (per Second)
12.5k
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1.25mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
LTC1286/LTC1298
APPLICATION INFORMATION
0.2V reference. If this offset is unacceptable, it can be
corrected digitally by the receiving system or by offsetting
the “–” input of the LTC1286.
Noise with Reduced V
The total input referred noise of the LTC1286 can be
reduced to approximately 400 V peak-to-peak using a
ground plane, good bypassing, good layout techniques
and minimizing noise on the reference inputs. This noise
is insignificant with a 5V reference but will become a larger
fraction of an LSB as the size of the LSB is reduced.
For operation with a 5V reference, the 400 V noise is
only 0.33LSB peak-to-peak. In this case, the LTC1286
noise will contribute virtually no uncertainty to the
output code. However, for reduced references the noise
may become a significant fraction of an LSB and cause
undesirable jitter in the output code. For example, with
a 2.5V reference this same 400 V noise is 0.66LSB
peak-to-peak. This will reduce the range of input volt-
ages over which a stable output code can be achieved by
1LSB. If the reference is further reduced to 1V, the 400 V
noise becomes equal to 1.65LSBs and a stable code may
be difficult to achieve. In this case averaging multiple
readings may be necessary.
This noise data was taken in a very clean setup. Any setup
induced noise (noise or ripple on V
to the internal noise. The lower the reference voltage to be
used the more critical it becomes to have a clean, noise free
setup.
Conversion Speed with Reduced V
With reduced reference voltages, the LSB step size is
reduced and the LTC1286 internal comparator over-
drive is reduced. Therefore, it may be necessary to
reduce the maximum CLK frequency when low values
of V
DYNAMIC PERFORMANCE
The LTC1286/LTC1298 have exceptional sampling capa-
bility. Fast Fourier Transform (FFT) test techniques are
used to characterize the ADC’s frequency response, dis-
18
REF
are used.
U
REF
U
CC
W
REF
, V
REF
or V
IN
U
) will add
tortion and noise at the rated throughput. By applying a low
distortion sine wave and analyzing the digital output using
an FFT algorithm, the ADC’s spectral content can be
examined for frequencies outside the fundamental. Figure
11 shows a typical LTC1286 plot.
Signal-to-Noise Ratio
The Signal-to-Noise plus Distortion Ratio (S/N + D) is the
ratio between the RMS amplitude of the fundamental
input frequency to the RMS amplitude of all other fre-
quency components at the ADC’s output. The output is
band limited to frequencies above DC and below one half
the sampling frequency. Figure 12 shows a typical spec-
tral content with a 12.5kHz sampling rate.
Effective Number of Bits
The Effective Number of Bits (ENOBs) is a measurement of
the resolution of an ADC and is directly related to S/(N+D)
by the equation:
where S/(N + D) is expressed in dB. At the maximum
sampling rate of 12.5kHz with a 5V supply, the LTC1286
maintains above 11 ENOBs at 10kHz input frequency.
Above 10kHz the ENOBs gradually decline, as shown in
Figure 12, due to increasing second harmonic distortion.
The noise floor remains low.
Figure 11. LTC1286 Non-Averaged, 4096 Point FFT Plot
ENOB = [S/(N + D) – 1.76]/6.02
–100
–140
–120
–20
–60
–80
–40
0
0
T
V
f
f
f
CLK
SMPL
A
CC
IN
= 25°C
1
= 5kHz
= V
= 200kHz
= 12.5kHz
REF
2
= 5V
FREQUENCY (kHz)
3
4
5
LTC 1286/98 G21
6
7