LTC2440CGN#PBF Linear Technology, LTC2440CGN#PBF Datasheet
LTC2440CGN#PBF
Specifications of LTC2440CGN#PBF
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LTC2440CGN#PBF Summary of contents
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... LTC2410 and is available in a narrow 16-lead SSOP package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. No Latency Δ∑ trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. 100 V ...
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... Storage Temperature Range ................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC2440CGN#PBF LTC2440CGN#TRPBF LTC2440IGN#PBF LTC2440IGN#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based fi nish parts. ...
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ANALOG INPUT AND REFERENCE temperature range, otherwise specifi cations are at T SYMBOL PARAMETER + IN Absolute/Common Mode IN – IN Absolute/Common Mode IN V Input Differential Voltage Range ( REF Absolute/Common Mode REF – REF Absolute/Common Mode ...
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LTC2440 POWER REQUIREMENTS range, otherwise specifi cations are at T SYMBOL PARAMETER V Supply Voltage CC I Supply Current CC Conversion Mode Sleep Mode TIMING CHARACTERISTICS range, otherwise specifi cations are at T SYMBOL PARAMETER f External Oscillator Frequency Range ...
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TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity f = 3.5kHz OUT 2.5V CC INCM GND REF 25°C REF A – GND REF ...
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LTC2440 TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity f = 6.875Hz OUT 2.5V CC INCM GND REF 25°C REF A – GND ...
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TYPICAL PERFORMANCE CHARACTERISTICS Negative Full-Scale Error vs Temperature 4. 5.5V 4. REF REF + + REF REF – – V ...
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LTC2440 PIN FUNCTIONS GND (Pins 16): Ground. Multiple ground pins internally connected for optimum ground current fl ow and V decoupling. Connect each one of these pins to a ground CC plane through a low impedance connection. ...
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FUNCTIONAL BLOCK DIAGRAM V CC GND + + IN – – IN DAC + – + REF – REF TEST CIRCUITS SDO 1.69k C LOAD Hi Hi-Z OH APPLICATIONS INFORMATION ...
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LTC2440 APPLICATIONS INFORMATION Initially, the LTC2440 performs a conversion. Once the conversion is complete, the device enters the sleep state. While in this sleep state, power consumption is reduced below 10μA. The part remains in the sleep state as long ...
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APPLICATIONS INFORMATION + 0.5 • V where V = REF – REF REF REF the converter indicates the overrange or the underrange condition using distinct output codes. Output Data Format The LTC2440 serial output data stream is 32-bits long. The ...
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LTC2440 APPLICATIONS INFORMATION microcontroller. Bit 31 (EOC) can be captured on the fi rst rising edge of SCK. Bit 30 is shifted out of the device on the fi rst falling edge of SCK. The fi nal data bit (Bit ...
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APPLICATIONS INFORMATION Chip Select Input (CS) The active LOW chip select, CS (Pin 11), is used to test the conversion status and to enable the data output transfer as described in the previous sections. In addition, the CS signal can ...
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LTC2440 APPLICATIONS INFORMATION CS SCK SDI OSR4* BIT 31 Hi-Z SDO EOC BUSY *OSR4 BIT MUST BE AT FIRST SCK RISING EDGE DURING SERIAL DATA OUT CYCLE Table 3. SDI Speed/Resolution Programming OSR4 OSR3 OSR2 OSR1 ...
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APPLICATIONS INFORMATION CS TEST EOC TEST EOC SDO Hi-Z Hi-Z SCK (EXTERNAL) BUSY CONVERSION SLEEP EOC = 1 (BUSY = 1) while a conversion is in progress and EOC = 0 (BUSY = 0) if the device is in the ...
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LTC2440 APPLICATIONS INFORMATION CS TEST EOC BIT 0 EOC SDO Hi-Z Hi SCK (EXTERNAL) BUSY SLEEP CONVERSION DATA OUTPUT Figure 6. External Serial Clock, Reduced Data Output Length CS SDO SCK (EXTERNAL) BUSY CONVERSION SLEEP Figure 7. External ...
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APPLICATIONS INFORMATION controller indicating the conversion result is ready. EOC = 1 (BUSY = 1) while the conversion is in progress and EOC = 0 (BUSY = 0) once the conversion enters the low power sleep state. On the falling ...
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LTC2440 APPLICATIONS INFORMATION on this fi rst rising edge of SCK and concludes after the 32nd rising edge. Data is shifted out the SDO pin on each falling edge of SCK. The internally generated serial clock is output to the ...
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APPLICATIONS INFORMATION CS BIT 31 BIT 30 SDO EOC SCK (INTERNAL) BUSY CONVERSION SLEEP falling edge of SCK. The internally generated serial clock is output to the SCK pin. This signal may be used to shift the conversion result into ...
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LTC2440 APPLICATIONS INFORMATION Table 5. OSR vs Notch Frequency (f ) with Internal Oscillator N Running at 9MHz OSR 64 128 256 512 1024 2048 4096 8192 16384 32768* *Simultaneous 50/60 rejection –80 –90 –100 –110 –120 –130 –140 47 ...
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APPLICATIONS INFORMATION The sample rate f and NULL also be adjusted driving the f pin with an external oscillator. The sample O rate /5, where f is the frequency of ...
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LTC2440 APPLICATIONS INFORMATION CONVERTER SLEEP STATE DATA OUT CS SUPPLY 8μA CURRENT LTC2440 Input Structure Modern delta sigma converters have switched capacitor front ends that repeatedly sample the input voltage over some time period. The sampling process produces a small ...
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APPLICATIONS INFORMATION Direct Connection to Low Impedance Sources If the ADC can be located physically close to the sensor, it can be directly connected to sensors or other sources with impedances up to 350Ω with no other components required (see ...
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... Figure 20. Large Signal Input Settling Time Indicates Completed Settling with Selected Load Capacitance. 24 For more information on testing high linearity ADCs, refer to Linear Technology Design Solutions 11. Input Bandwidth and Frequency Rejection The combined effect of the internal SINC the digital and analog autocalibration circuits determines the LTC2440 input bandwidth and rejection characteristics. The digital fi ...
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APPLICATIONS INFORMATION Table 6 lists the properties of the LTC2440 with various combinations of oversample ratio and clock frequency. Understanding these properties is the key to fi ne tuning the characteristics of the LTC2440 to the application. Maximum Conversion Rate ...
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LTC2440 APPLICATIONS INFORMATION Example amplifi er (e.g. LT1219) driving the input of an LTC2440 has wideband noise of 33nV/√Hz, band-limited to 1.8MHz, the total noise entering the ADC input is: 33nV/√Hz • √1.8MHz = 44.3μV. When the ADC ...
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... Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .045 ± ...
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... No Latency Δ∑ ADC LTC2411 24-Bit, No Latency Δ∑ ADC in MSOP LTC2420LTC2424/ 1-/4-/8-Channel, 20-Bit, No Latency Δ∑ ADCs LTC2428 SoftSpan is a trademark of Linear Technology Corporation. Linear Technology Corporation 28 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 ● ...