LTC1418CG Linear Technology, LTC1418CG Datasheet - Page 24

• Manufacturer Part Number: LTC1418CG
• Description: IC A/D CONV 14BIT SRL&PAR 28SSOP
• Manufacturer: Linear Technology

Specifications of LTC1418CG

• Number Of Bits: 14
• Sampling Rate (per Second): 200k
• Data Interface: Serial, Parallel
• Number Of Converters: 1
• Power Dissipation (max): 21.5mW Unipolar; 31.5mW Bipolar
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS
LTC1418
clock to EXTCLKIN. The same clock is also applied to SCLK
to provide a data shift clock. To maintain accuracy the
conversion clock frequency must be between 30kHz and
4.5MHz.
It is not recommended to clock data with an external clock
during a conversion that is running on an internal clock
because the asynchronous clocks may create noise.
24
CS = EXT/INT = 0
CONVST
BUSY
SCLK
D
OUT
RD
t
6
U
t
5
(SAMPLE N)
INFORMATION
Figure 24. Internal Conversion Clock Selected. Data Transferred After Conversion
Using an External SCLK. BUSY Indicates End of Conversion
U
CONVST
Hi-Z
t
CONV
HOLD
W
24
CONVST
LTC1418
CS
U
EXT/INT
25
BUSY
SCLK
D
OUT
RD
26
19
20
23
17
D13
t
Serial Data Output After a Conversion
Using Internal Conversion Clock and External Data Clock.
In this mode, data is output after the end of each conver-
sion but before the next conversion is started (Figure 24).
The internal clock is used as the conversion clock and an
external clock is used for the SCLK. This mode is useful in
applications where the processor acts as a master serial
device. This mode is SPI and MICROWIRE compatible. It
9
1
t
13
t
10
12 11 10 9
2
3
4
SCLK
D
5
INT
C0
SCK
MISO
OUT
DATA N
8
6
P OR DSP
7
7
1418 F24a
t
6
8
V
8
SAMPLE
D13
IL
5
9 10 11 12 13 14 15 16
t
15
4
t
t
14
LSCLK
3
RISING CLOCK
CAPTURE ON
2
1
0
D12
t
HSCLK
ZEROS
FILL
FALLING CLOCK
CAPTURE ON
t
11
1418 F24b
Hi-Z
D11
V
V
OH
OL