LTC2220IUP#TRPBF Linear Technology, LTC2220IUP#TRPBF Datasheet
LTC2220IUP#TRPBF
Specifications of LTC2220IUP#TRPBF
Available stocks
Related parts for LTC2220IUP#TRPBF
LTC2220IUP#TRPBF Summary of contents
Page 1
... APPLICATIO S ■ Wireless and Wired Broadband Communication ■ Cable Head-End Systems ■ Power Amplifier Linearization ■ Communications Test Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO 3. REFH FLEXIBLE REFERENCE ...
Page 2
LTC2220/LTC2221 ABSOLUTE AXI U RATI (Notes Supply Voltage (V ) ................................................. 4V DD Digital Output Ground Voltage (OGND) ....... –0. Analog Input Voltage (Note 3) ..... –0.3V ...
Page 3
ALOG I PUT The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are 25°C. (Note 4) A SYMBOL PARAMETER V Analog Input Range ( Analog ...
Page 4
LTC2220/LTC2221 TER AL REFERE CE CHARACTERISTICS PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, ...
Page 5
W U POWER REQUIRE E TS range, otherwise specifications are at T SYMBOL PARAMETER V Analog Supply Voltage DD P Shutdown Power SHDN P Nap Mode Power NAP LVDS OUTPUT MODE OV Output Supply Voltage DD I Analog Supply Current ...
Page 6
LTC2220/LTC2221 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage ...
Page 7
W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2220: SFDR (HD2 and HD3) vs Input Frequency, –1dB, 1V Range, LVDS Mode 100 100 200 300 400 500 600 INPUT FREQUENCY (MHz) 2220 G07 LTC2220: ...
Page 8
LTC2220/LTC2221 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2220: 8192 Point FFT 30MHz, –1dB, 2V Range, IN LVDS Mode 0 –20 –40 –60 –80 –100 –120 FREQUENCY (MHz) 2220 ...
Page 9
W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2221: INL, 2V Range 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 1024 2048 3072 4096 OUTPUT CODE 2221 G01 LTC2221: SNR vs Input Frequency, –1dB, 2V Range, LVDS ...
Page 10
LTC2220/LTC2221 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2221: SFDR and SNR vs Sample Rate, 2V Range 30MHz, –1dB, LVDS Mode IN 100 95 90 SFDR SNR ...
Page 11
W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2221: 8192 Point FFT 30MHz, –1dB, 2V Range, IN LVDS Mode 0 – 10 – 20 – 30 – 40 – 50 – 60 – 70 – 80 – 90 – ...
Page 12
LTC2220/LTC2221 CTIO S (CMOS Mode (Pins 1, 2): Positive Differential Analog Input. IN – A (Pins 3, 4): Negative Differential Analog Input. IN REFHA (Pins 5, 6): ADC High Reference. Bypass to Pins ...
Page 13
CTIO S SENSE (Pin 59): Reference Programming Pin. Connecting selects the internal reference and a ±0.5V SENSE input range. Connecting SENSE to V reference and a ±1V input range. An external reference ...
Page 14
LTC2220/LTC2221 CTIO S MODE (Pin 58): Output Format and Clock Duty Cycle Stabilizer Selection Pin. Connecting MODE to 0V selects offset binary output format and turns the clock duty cycle stabilizer off. Connecting MODE to ...
Page 15
U U FUNCTIONAL BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H ADC STAGE – 1.6V CM REFERENCE 2.2µF RANGE SELECT REF BUF SENSE W SECOND PIPELINED THIRD PIPELINED ADC STAGE ADC STAGE REFH REFL INTERNAL CLOCK ...
Page 16
LTC2220/LTC2221 DIAGRA S ANALOG N INPUT – ENC + ENC D0-D11, OF – CLOCKOUT + CLOCKOUT ANALOG N INPUT – ENC + ENC DA0-DA11, OFA CLOCKOUTB CLOCKOUTA DB0-DB11, OFB 16 LVDS Output Mode Timing ...
Page 17
DIAGRA S ANALOG N INPUT – ENC + ENC DA0-DA11, OFA DB0-DB11, OFB CLOCKOUTB CLOCKOUTA Demultiplexed CMOS Outputs with Simultaneous Update ANALOG N INPUT – ENC + ENC DA0-DA11, OFA DB0-DB11, OFB CLOCKOUTB CLOCKOUTA ...
Page 18
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all ...
Page 19
U U APPLICATIO S I FOR ATIO Each pipelined stage shown in Figure 1 contains an ADC, a reconstruction DAC and an interstage residue amplifier. In operation, the ADC quantizes the input to the stage and the quantized value is ...
Page 20
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO the 2V range or ±0.25V for the 1V range, around a common mode voltage of 1.6V. The V 60) may be used to provide the common mode bias level. V can be ...
Page 21
U U APPLICATIO S I FOR ATIO + – The A and A inputs each have two pins to reduce package inductance. The two A IN should be shorted together. For input frequencies above 100MHz the input ...
Page 22
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO Other voltage ranges in between the pin selectable ranges can be programmed with two external resistors as shown in Figure 10. An external reference can be used by applying its output directly ...
Page 23
U U APPLICATIO S I FOR ATIO duty cycle stabilizer will maintain a constant 50% internal duty cycle. If the clock is turned off for a long period of time, the duty cycle stabilizer circuit will require one hundred clock ...
Page 24
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO As with all high speed/high resolution converters, the digital output loading can affect the performance. The digital outputs of the LTC2220/LTC2221 should drive a minimal capacitive load to avoid possible interaction be- ...
Page 25
U U APPLICATIO S I FOR ATIO Output Driver Power Separate output power and ground pins allow the output drivers to be isolated from the analog circuitry. The power supply for the digital output buffers the same power ...
Page 26
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO Clock Sources for Undersampling Undersampling raises the bar on the clock source and the higher the input frequency, the greater the sensitivity to clock jitter or phase noise. A clock source that ...
Page 27
U U APPLICATIO S I FOR ATIO W U LTC2220/LTC2221 22201fa 27 ...
Page 28
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO Silkscreen Top 22201fa ...
Page 29
U U APPLICATIO S I FOR ATIO W U Layer 1 Component Side Layer 2 GND Plane LTC2220/LTC2221 22201fa 29 ...
Page 30
LTC2220/LTC2221 U U APPLICATIO S I FOR ATIO Layer 3 Power Plane Layer 4 Bottom Side 22201fa ...
Page 31
... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights Package 64-Lead Plastic QFN (9mm × ...
Page 32
... BW, 47dB OIP3, Digital Gain Control 10.5dB to 33dB in 1.5dB/Step High IIP3: 20dBm at 1.9GHz, Integrated LO Quadrature Generator 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz 12.5dB, 50Ω Single Ended RF and LO Ports www.linear.com ● 22201fa LT 0106 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2004 ...