AD7856KR-REEL Analog Devices Inc, AD7856KR-REEL Datasheet - Page 10

• Manufacturer Part Number: AD7856KR-REEL
• Description: IC ADC 14BIT 8CH 5V 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7856KR-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 14
• Sampling Rate (per Second): 285k
• Data Interface: 8051, QSPI™, Serial, SPI™ µP
• Number Of Converters: 2
• Power Dissipation (max): 89.25mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)

AD7856
CONTROL REGISTER
The arrangement of the Control Register is shown below. The control register is a write only register and contains 14 bits of data.
The control register is selected by putting two 1s in ADDR1 and ADDR0. The function of the bits in the control register are de-
scribed below. The power-up status of all bits is 0.
Bit
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Mnemonic
SGL/DIFF
CH2
CH1
CH0
PMGT1
PMGT0
RDSLT1
RDSLT0
2/3 MODE
CONVST
CALMD
CALSLT1
CALSLT0
STCAL
MSB
SGL/DIFF
RDSLT0
2/3 MODE
Comment
A 0 in this bit position configures the input channels in pseudo-differential mode. A 1 in this bit position
configures the input channels in single-ended mode (see Table III).
These three bits are used to select the channel on which the conversion is performed. The channels can
be configured as eight single-ended channels or four pseudo-differential channels. The default selection
is AIN1 for the positive input and AIN2 for the negative input (see Table III for channel selection).
Power Management Bits. These two bits are used with the SLEEP pin for putting the part into various
power-down modes (see Power-Down section for more details).
These two bits determine which register is addressed for the read operations (see Table II).
Interface Mode Select Bit. With this bit set to 0, Interface Mode 2 is enabled. With this bit set to 1,
Interface Mode 1 is enabled where DIN is used as an output as well as an input. This bit is set to 0 by
default after every read cycle; thus when using the Two-Wire Interface Mode, this bit needs to be set to
1 in every write cycle.
Conversion Start Bit. A logic one in this bit position starts a single conversion, and this bit is automatically
reset to 0 at the end of conversion. This bit may also used in conjunction with system calibration (see
Calibration section.)
Calibration Mode Bit. A 0 here selects self-calibration, and a 1 selects a system calibration (see Table IV).
Calibration Selection Bits and Start Calibration Bit. These bits have two functions.
With the STCAL bit set to 1 the CALSLT1 and CALSLT0 bits determine the type of calibration per-
formed by the part (see Table IV). The STCAL bit is automatically reset to 0 at the end of calibration.
With the STCAL bit set to 0 the CALSLT1 and CALSLT0 bits are decoded to address the calibration
register for read/write of calibration coefficients (see section on the Calibration Registers for more details).
CH2
CONTROL REGISTER BIT FUNCTION DESCRIPTION
CONVST
CH1
CALMD
CH0
–10–
CALSLT1
PMGT1
CALSLT0
PMGT0
RDSLT1
STCAL
LSB
REV. A