AD7665ASTZ Analog Devices Inc, AD7665ASTZ Datasheet
AD7665ASTZ
Specifications of AD7665ASTZ
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AD7665ASTZ Summary of contents
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FEATURES Throughput 570 kSPS (Warp Mode) 500 kSPS (Normal Mode) INL: 2.5 LSB Max ( 0.0038% of Full Scale) 16-Bit Resolution with No Missing Codes S/(N+D Typ @ 180 kHz THD: –100 dB Typ @ 180 kHz ...
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AD7665–SPECIFICATIONS Parameter RESOLUTION ANALOG INPUT Voltage Range Common-Mode Input Voltage Analog Input CMRR Input Impedance THROUGHPUT SPEED Complete Cycle Throughput Rate Time between Conversions Complete Cycle Throughput Rate Complete Cycle Throughput Rate DC ACCURACY Integral Linearity Error No Missing Codes ...
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Parameter POWER SUPPLIES (Continued Power Dissipation 9 In Power-Down Mode 10 TEMPERATURE RANGE Specified Performance NOTES 1 LSB means least significant bit. With the ±5 V input range, one LSB is 152.588 µV. 2 See Definition of Specifications ...
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AD7665 TIMING SPECIFICATIONS (continued) Parameter Refer to Figures 17 and 18 (Master Serial Interface Modes) CS LOW to SYNC Valid Delay CS LOW to Internal SCLK Valid Delay CS LOW to SDOUT Delay CNVST LOW to SYNC Delay (Read during ...
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ABSOLUTE MAXIMUM RATINGS Analog Inputs IND , INC , INB . . . . . . . . . . . . . . . . . . . . – +30 V INA, ...
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AD7665 Pin No. Mnemonic Type Description 1 AGND P Analog Power Ground Pin. 2 AVDD P Input Analog Power Pin. Nominally 44– Connect. 4 BYTESWAP Parallel Mode Selection (8/16 Bit). When LOW, the LSB is ...
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Pin No. Mnemonic Type Description 21 D[8] DO When SER/PAR is LOW, this output is used as Bit 8 of the Parallel Port Data Output Bus. or SDOUT When SER/PAR is HIGH, this output, part of the Serial Port, is ...
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AD7665 DEFINITION OF SPECIFICATIONS Internal Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from “negative full scale” through “positive full scale.” The point used as negative full scale occurs 1/2 LSB ...
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TPC 1. Integral Nonlinearity vs. Code TPC 2. Differential Nonlinearity vs. Code 0.3 0.6 0.9 1.2 1.5 POSITIVE INL – LSB TPC 3. Typical Positive INL Distribution (446 Units) C REV. ...
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AD7665 –0 –20 –40 –60 –80 –100 –120 –140 –160 –180 0 57 114 171 FREQUENCY – kHz TPC 7. FFT Plot 100 95 SNR 90 SINAD FREQUENCY – kHz TPC 8. SNR, S/(N+D), ...
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C – TPC 13. Typical Delay vs. Load Capacitance C 100000 AVDD, WARP/NORMAL 10000 DVDD, WARP/NORMAL 1000 100 AVDD, IMPULSE 10 DVDD, IMPULSE 1 0.1 0.01 0.001 1 10 ...
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AD7665 4R IND REF 4R REFGND INC 2R INB R INA INGND CIRCUIT INFORMATION The AD7665 is a fast, low power, single-supply, precise 16-bit analog-to-digital converter (ADC). The AD7665 features different modes to optimize performances according to the applications. In ...
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Description 1 Full-Scale Range ±10 V ±5 V Least Significant Bit 305.2 µV 152.6 µV FSR – 1 LSB 9.999695 V 4.999847 V Midscale + 1 LSB 305.2 µV 152.6 µV Midscale Midscale – 1 LSB ...
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AD7665 Analog Inputs The AD7665 is specified to operate with six full-scale analog input ranges. Connections required for each of the four analog inputs, IND, INC, INB, and INA, and the resulting full-scale ranges are shown in Table I. The ...
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Driver Amplifier Choice Although the AD7665 is easy to drive, the driver amplifier needs to meet at least the following requirements: ∑ The driver amplifier and the AD7665 analog input circuit must be able, together, to settle for a full-scale ...
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AD7665 100 FREQUENCY – kHz Figure 9. PSRR vs. Frequency POWER DISSIPATION In Impulse Mode, the AD7665 automatically reduces its power consumption at the end of each conversion phase. ...
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DIGITAL INTERFACE The AD7665 has a versatile digital interface; it can be interfaced with the host system by using either a serial or parallel interface. The serial interface is multiplexed on the parallel data bus. The AD7665 digital interface also ...
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AD7665 CS CNVST BUSY t 29 SYNC t 14 SCLK t 15 SDOUT t 16 Figure 17. Master Serial Data Timing for Reading (Read after Convert) CS, RD CNVST BUSY t 17 SYNC ...
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CS BUSY SCLK t 31 SDOUT t 16 SDIN t 33 Figure 19. Slave Serial Data Timing for Reading (Read after Convert) In Read-during-Conversion Mode, the serial clock and data toggle at appropriate instants, which minimizes potential feedthrough between digital ...
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AD7665 CS, RD CNVST BUSY t 3 SCLK SDOUT t 16 Figure 21. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert) External Clock Data Read during Conversion Figure 21 shows the detailed timing diagrams ...
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ADSP-21065L has been reset to ensure that the Serial Port is properly synchronized to this clock during each following data read operation. DVDD AD7665 * ...
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... SEATING PLANE ORDERING GUIDE 1, 2 Model Temperature Range AD7665ASTZ –40°C to +85°C AD7665ASTZRL –40°C to +85°C AD7665ACPZ –40°C to +85°C AD7665ACPZRL –40°C to +85°C EVAL-AD7665CBZ RoHS Compliant Part. 2 The EVAL-AD7665CB can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes. ...
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REVISION HISTORY 2/11—Rev Rev. C Changes to PulSAR Selection Table ............................................... 1 Added EPAD Notation .................................................................... 5 Updated Outline Dimensions ....................................................... 22 Changes to Ordering Guide .......................................................... 22 4/03—Rev Rev. B Changes to PulSAR Selection Table ...