AD7711AR Analog Devices Inc, AD7711AR Datasheet - Page 3

• Manufacturer Part Number: AD7711AR
• Description: IC ADC 24BIT RTD I SOURCE 24SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7711AR

• Rohs Status: RoHS non-compliant
• Number Of Bits: 24
• Sampling Rate (per Second): 1.03k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 80°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Number Of Elements: 1
• Resolution: 24Bit
• Architecture: Delta-Sigma
• Sample Rate: 19.5KSPS
• Input Polarity: Unipolar/Bipolar
• Input Type: Voltage
• Rated Input Volt: 5/±5V
• Differential Input: Yes
• Power Supply Requirement: Single/Dual
• Single Supply Voltage (typ): 5/10V
• Single Supply Voltage (min): 4.75V
• Single Supply Voltage (max): 10.5V
• Dual Supply Voltage (typ): ±5/-5/10V
• Dual Supply Voltage (min): ±4.75V
• Dual Supply Voltage (max): -5.25/10.5V
• Power Dissipation: 52.5mW
• Integral Nonlinearity Error: ±0.003%FSR
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Not Compliant

Parameter
V
LOGIC INPUTS
LOGIC OUTPUTS
TRANSDUCER BURNOUT
RTD EXCITATION CURRENTS (RTD1, RTD2)
SYSTEM CALIBRATION
NOTES
12
13
14
15
REV. G
The AD7711 is tested with the following V
Guaranteed by design, not production tested.
After calibration, if the analog input exceeds positive full scale, the converter outputs all 1s. If the analog input is less than negative full scale, the device outputs all 0s.
These calibration and span limits apply, provided the absolute voltage on the analog inputs does not exceed AV
BIAS
with AV
The offset calibration limit applies to both the unipolar zero point and the bipolar zero point.
Input Voltage Range
V
Input Current
All Inputs except MCLK IN
MCLK IN Only
V
V
Floating State Leakage Current
Floating State Output Capacitance
Current
Initial Tolerance @ 25∞C
Drift
Output Current
Initial Tolerance @ 25∞C
Drift
Initial Matching @ 25∞C
Drift Matching
Line Regulation (AV
Load Regulation
Output Compliance
Positive Full-Scale Calibration Limit
Negative Full-Scale Calibration Limit
Offset Calibration Limit
Input Span
BIAS
OL
OH
V
V
V
V
INPUT
, Output Low Voltage
, Output High Voltage
INL
INH
INL
INH
Rejection
DD
, Input Low Voltage
, Input Low Voltage
, Input High Voltage
, Input High Voltage
= 5 V and V
12
15
DD
SS
)
= –5 V, V
15
BIAS
13
14
= 0 V.
14
BIAS
voltages. With AV
A, S Versions
AV
or AV
or AV
V
or V
or V
65 to 85
± 10
0.8
2.0
0.8
3.5
0.4
4.0
± 10
9
4.5
± 10
0.1
200
± 20
20
± 1
3
200
200
AV
(1.05 ¥ V
–(1.05 ¥ V
–(1.05 ¥ V
0.8 ¥ V
(2.1 ¥ V
SS
DD
DD
+ 0.85 ¥ V
SS
SS
DD
DD
DD
– 0.85 ¥ V
– 2
+ 3
+ 2.1
REF
REF
= 5 V and V
– 3.5
– 2.1
REF
REF
REF
/GAIN
)/GAIN
)/GAIN
)/GAIN
)/GAIN
1
REF
REF
–3–
SS
= 0 V, V
Unit
V max
V max
V min
dB typ
mA max
V max
V min
V max
V min
V max
V min
mA max
pF typ
mA nom
% typ
%/∞C typ
mA nom
% max
ppm/∞C typ
% max
ppm/∞C typ
nA/V max
nA/V max
V max
V max
V max
V max
V min
V max
V min
BIAS
= 2.5 V; with AV
Matching between RTD1 and RTD2 Current Drift
Conditions/Comments
See V
Whichever Is Smaller; +5 V/–5 V or +10 V/0 V
Nominal AV
Whichever Is Smaller; +5 V/0 V Nominal AV
See V
Whichever Is Greater; +5 V/–5 V or +10 V/0 V
Nominal AV
Whichever Is Greater; +5 V/0 V Nominal AV
Increasing with Gain
I
I
Matching between RTD1 and RTD2 Currents
AV
GAIN Is the Selected PGA Gain (between 1 and 128)
GAIN Is the Selected PGA Gain (between 1 and 128)
GAIN Is the Selected PGA Gain (between 1 and 128)
GAIN Is the Selected PGA Gain (between 1 and 128)
GAIN Is the Selected PGA Gain (between 1 and 128)
SINK
SOURCE
DD
DD
= 1.6 mA
BIAS
BIAS
= 5 V
DD
+ 30 mV or go more negative than V
= 100 mA
Input Section
Input Section
= 10 V and V
DD
DD
/V
/V
SS
SS
SS
= 0 V, V
BIAS
= 5 V, and
AD7711
SS
– 30 mV.
DD
DD
/V
/V
SS
SS