AD9248BSTZ-65 Analog Devices Inc, AD9248BSTZ-65 Datasheet
AD9248BSTZ-65
Specifications of AD9248BSTZ-65
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AD9248BSTZ-65 Summary of contents
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FEATURES Integrated dual 14-bit ADC Single 3 V supply operation (2 3.6 V) SNR = 71.6 dB (to Nyquist, AD9248-65) SFDR = 80.5 dBc (to Nyquist, AD9248-65) Low power: 300 mW/channel at 65 MSPS Differential input with 500 ...
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AD9248 TABLE OF CONTENTS Specifications..................................................................................... 3 DC Specifications ......................................................................... 3 AC Specifications.......................................................................... 5 Digital Specifications ................................................................... 6 Switching Specifications .............................................................. 7 Absolute Maximum Ratings............................................................ 8 Explanation of Test Levels ........................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 ...
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SPECIFICATIONS DC SPECIFICATIONS AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B DCS enabled, unless otherwise noted. MIN MAX Table 1. Parameter Temp RESOLUTION Full ACCURACY No Missing Codes Guaranteed ...
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AD9248 Parameter Temp MATCHING CHARACTERISTICS Offset Error 25°C (Nonshared Reference Mode) Offset Error 25°C (Shared Reference Mode) Gain Error 25°C (Nonshared Reference Mode) Gain Error 25°C (Shared Reference Mode) 1 Gain error and gain temperature coefficient are based on the ...
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AC SPECIFICATIONS AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B DCS Enabled, unless otherwise noted. MIN MAX Table 2. Parameter SIGNAL-TO-NOISE RATIO (SNR 2.4 MHz INPUT f ...
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AD9248 Parameter WORST OTHER SPUR (NONSECOND or THIRD 2.4 MHz INPUT f = 9.7 MHz INPUT f = 19.6 MHz INPUT MHz INPUT f = 100 MHz INPUT SPURIOUS-FREE DYNAMIC RANGE (SFDR 2.4 ...
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SWITCHING SPECIFICATIONS AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B DCS enabled, unless otherwise noted. MIN MAX Table 4. Parameter Temp SWITCHING PERFORMANCE Maximum Conversion Rate Full Minimum Conversion ...
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AD9248 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Pin Name ELECTRICAL AVDD DRVDD AGND AVDD Digital Outputs CLK, DCS, MUX_SELECT, SHARED_REF OEB, DFS VINA, VINB VREF SENSE REFB, REFT PDWN ENVIRONMENTAL 2 Operating Temperature Junction Temperature Lead Temperature (10 sec) Storage ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AGND VIN+_A VIN–_A AGND AVDD REFT_A REFB_A VREF SENSE REFB_B REFT_B AVDD AGND VIN–_B VIN+_B AGND PIN 1 ...
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AD9248 Table 6. Pin Function Descriptions (64-Lead LQFP and 64-Lead LFCSP) Pin No. Mnemonic Description 1, 4, 13, 16 AGND Analog Ground. 2 VIN+_A Analog Input Pin (+) for Channel A. 3 VIN−_A Analog Input Pin (−) for Channel A. ...
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TERMINOLOGY Aperture Delay SHA performance measured from the rising edge of the clock input to when the input signal is held for conversion. Aperture Jitter The variation in aperture delay for successive samples, which is manifested as noise on the ...
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AD9248 TYPICAL PERFORMANCE CHARACTERISTICS AVDD, DRVDD = 3 25° –20 –40 –60 –80 SECOND CROSSTALK HARMONIC –100 –120 FREQUENCY (MHz) Figure 4. Single-Tone FFT of Channel A Digitizing f ...
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SFDR SNR 80 70 SNR –35 –30 –25 –20 –15 –10 INPUT AMPLITUDE (dBFS) Figure 10. AD9248-65 Single-Tone SFDR/SNR vs. A 100 90 80 SNR SFDR 70 SNR –35 –30 –25 –20 ...
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AD9248 0 –20 –40 –60 IMD = –85dBc –80 –100 –120 FREQUENCY (MHz) Figure 16. Dual-Tone FFT with MHz and –20 –40 IMD = –83dBc –60 –80 –100 ...
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SINAD –20 72 SINAD –65 SINAD – CLOCK FREQUENCY (MHz) Figure 22. SINAD vs. FS with Nyquist Input 95 DCS ON (SFDR DCS OFF (SFDR DCS ON (SINAD ...
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AD9248 EQUIVALENT CIRCUITS AVDD VIN+_A, VIN–_A, VIN+_B, VIN–_B Figure 28. Equivalent Analog Input Circuit DRVDD Figure 29. Equivalent Digital Output Circuit AVDD CLK_A, CLK_B DCS, DFS, MUX_SELECT, SHARED_REF Figure 30. Equivalent Digital Input Circuit Rev Page 16 of ...
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THEORY OF OPERATION The AD9248 consists of two high performance ADCs that are based on the AD9235 converter core. The dual ADC paths are independent, except for a shared internal band gap reference source, VREF. Each of the ADC paths ...
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AD9248 The minimum common-mode input level allows the AD9248 to accommodate ground-referenced inputs. Although optimum performance is achieved with a differential input, a single- ended source may be driven into VIN+ or VIN−. In this configuration, one input accepts the ...
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POWER DISSIPATION AND STANDBY MODE The power dissipated by the AD9248 is proportional to its sampling rates. The digital (DRVDD) power dissipation ...
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AD9248 DATA FORMAT The AD9248 data output format can be configured for either twos complement or offset binary. This is controlled by the data format select pin (DFS). Connecting DFS to AGND produces offset binary output data. Conversely, connecting DFS ...
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External Reference Operation The use of an external reference may be necessary to enhance the gain accuracy of the ADC or to improve thermal drift characteristics. When multiple ADCs track one another, a single reference (internal or external) may be ...
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AD9248 AD9248 LQFP EVALUATION BOARD The evaluation board supports both the AD9238 and AD9248 and has five main sections: clock circuitry, inputs, reference circuitry, digital control logic, and outputs. A description of each section follows. Table 8 shows the jumper ...
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Table 8. PCB Jumpers Normal JP Description Setting Comment 1 Reference Out 1 V Reference Mode 2 Reference Reference Mode 3 Reference Out 1 V Reference Mode 4 Reference Out 1 V Reference Mode 5 Reference Out ...
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AD9248 LQFP EVALUATION BOARD BILL OF MATERIALS (BOM) Table 10. No. Quantity Reference Designator 1 18 C1, C2, C11, C12, C27, C28, C33, C34, C50, C51, C73 to C76, C87 to C90 C10, C29 to C31, ...
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LQFP EVALUATION BOARD SCHEMATICS Figure 39. Evaluation Board Schematic Rev Page AD9248 ...
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AD9248 Figure 40. Evaluation Board Schematic (Continued) Rev Page ...
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Figure 41. Evaluation Board Schematic (Continued) Rev Page AD9248 ...
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AD9248 C75 C3 C10 10µF 0.1µF 0.1µF 6.3V DATACLKA 1 RP9 22Ω RP9 22Ω 7 OTRA 3 RP9 22Ω 6 DA13 4 RP9 22Ω 5 DA12 1 8 RP10 22Ω DA11 2 RP10 22Ω 7 DA10 3 RP10 ...
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LQFP PCB LAYERS Figure 43. PCB Top Layer Rev Page AD9248 ...
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AD9248 Figure 44. Bottom Layer Rev Page ...
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Figure 45. PCB Ground Plane Rev Page AD9248 ...
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AD9248 Figure 46. PCB Split Power Plane Rev Page ...
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Figure 47. PCB Top Silkscreen (Note that the PCB Supports Both the AD9238 and AD9248 LQFP) Rev Page AD9248 ...
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AD9248 Figure 48. PCB Bottom Silkscreen Rev Page ...
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DUAL ADC LFCSP PCB The PCB requires a low jitter clock source, analog sources, and power supplies. The PCB interfaces directly with ADI’s standard dual-channel data capture board (HSC-ADC-EVAL-DC), which together with ADI’s ADC Analyzer™ software allows for quick ...
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AD9248 LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) Table 13. No. Quantity Reference Designator C2, C5, C7, C9, C10, C22, C36 3 44 C4, C6, C8, C11 to C15, C20, C21, C24 to C27, ...
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LFCSP PCB SCHEMATICS ENCA D7A D7_A 49 D8A D8_A 50 D9A D9_A 51 DRVDD2 52 DRGND2 53 D10A D10_A 54 D11A D11_A 55 D12A D12_A 56 D13A D13_A 57 OTRA OTR_A 58 OEB_A 59 PDWN_A 60 MUX_SEL 61 SH_REF 62 ...
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AD9248 Figure 50. PCB Schematic ( Rev Page ...
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Figure 51. PCB Schematic ( Rev Page AD9248 ...
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AD9248 LFCSP PCB LAYERS Figure 52. PCB Top-Side Silkscreen Rev Page ...
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Figure 53. PCB Top-Side Copper Routing Rev Page AD9248 ...
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AD9248 Figure 54. PCB Ground Layer Rev Page ...
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Figure 55. PCB Split Power Plane Rev Page AD9248 ...
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AD9248 Figure 56. PCB Bottom-Side Copper Routing Rev Page ...
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THERMAL CONSIDERATIONS The AD9248 LFCSP has an integrated heat slug that improves the thermal and electrical properties of the package when locally attached to a ground plane at the PCB. A thermal (filled) via array to a ground plane beneath ...
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AD9248 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW 9.00 BSC SQ PIN 1 INDICATOR TOP VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE 0.75 0.60 1.60 MAX 0. PIN 1 0.20 ...
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... Lead Frame Chip Scale Package (LFCSP_VQ) 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 64-Lead Lead Frame Chip Scale Package (LFCSP_VQ) Evaluation Board with AD9248BSTZ-65 Evaluation Board with AD9248BCPZ-65 Rev Page AD9248 Package Option ...
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AD9248 NOTES ©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04446–0–3/05(A) Rev Page ...