AD9255BCPZ-80 Analog Devices Inc, AD9255BCPZ-80 Datasheet - Page 2

IC ADC 14BIT 80MSPS 48LFCSP

AD9255BCPZ-80

Manufacturer Part Number
AD9255BCPZ-80
Description
IC ADC 14BIT 80MSPS 48LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9255BCPZ-80

Data Interface
Serial, SPI™
Number Of Bits
14
Sampling Rate (per Second)
80M
Number Of Converters
1
Power Dissipation (max)
248mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Resolution (bits)
14bit
Sampling Rate
80MSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
1.7V To 1.9V
Supply Voltage Range - Digital
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9255BCPZ-80
Manufacturer:
IXYS
Quantity:
2 300
Part Number:
AD9255BCPZ-80
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9255
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings .......................................................... 10
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 15
Equivalent Circuits ......................................................................... 23
Theory of Operation ...................................................................... 25
REVISION HISTORY
1/10—Rev. 0 to Rev. A
Changes to Worst Other (Harmonic or Spur) Parameter,
Table 2 ................................................................................................ 6
Changes to Figure 77 ...................................................................... 29
Changes to Input Clock Divider Section ..................................... 30
Changes to Table 17 ........................................................................ 37
Updated Outline Dimensions ....................................................... 41
10/09—Revision 0: Initial Version
ADC DC Specifications ................................................................. 4
ADC AC Specifications ................................................................. 5
Digital Specifications ................................................................... 6
Switching Specifications ................................................................ 8
Timing Specifications .................................................................. 9
Thermal Characteristics ............................................................ 10
ESD Caution ................................................................................ 10
ADC Architecture ...................................................................... 25
Analog Input Considerations .................................................... 25
Rev. A | Page 2 of 44
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Built-In Self-Test (BIST) and Output Test .................................. 33
Serial Port Interface (SPI) .............................................................. 34
Memory Map .................................................................................. 36
Applications Information .............................................................. 40
Outline Dimensions ....................................................................... 41
Voltage Reference ....................................................................... 28
Clock Input Considerations ...................................................... 29
Power Dissipation and Standby Mode .................................... 31
Digital Outputs ........................................................................... 32
Timing ......................................................................................... 32
Built-In Self-Test (BIST) ............................................................ 33
Output Test Modes ..................................................................... 33
Configuration Using the SPI ..................................................... 34
Hardware Interface ..................................................................... 34
Configuration Without the SPI ................................................ 35
SPI Accessible Features .............................................................. 35
Reading the Memory Map Register Table ............................... 36
Memory Map Register Table ..................................................... 37
Memory Map Register Descriptions ........................................ 39
Design Guidelines ...................................................................... 40
Ordering Guide .......................................................................... 41
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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