AS1524-BTDR austriamicrosystems, AS1524-BTDR Datasheet - Page 12
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AS1524-BTDR
Manufacturer Part Number
AS1524-BTDR
Description
IC A/D 12-BIT 1-CH 150K 8-TDFN
Manufacturer
austriamicrosystems
Datasheet
1.AS1524-BTDT.pdf
(22 pages)
Specifications of AS1524-BTDR
Number Of Bits
12
Sampling Rate (per Second)
150k
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-WDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AS1524/AS1525
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 19. Single Conversion – AIN1 vs. GND (AS1525), Unipolar Mode AIN+ vs. AIN- (AS1524)
If AIN2 is selected
then high again. This powers up the AS1525 and places the track/hold circuitry in track mode with AIN2 connected to
the positive input capacitor. Next hold CNVST high for
track/hold circuitry in hold mode. The AS1525 then performs a conversion and shuts down automatically. The MSB is
available at DOUT after 3.7µs. Data can then be clocked out using SCLK.
Note: If all 12 bits of data are not clocked out before CNVST is driven high, AIN2 is selected for the next conversion.
Selecting Unipolar or Bipolar Conversions (AS1524)
True-differential conversion (with the AS1524 unipolar and bipolar modes) is selected using pin CNVST
AIN+ and AIN- are sampled at the falling edge of CNVST. In unipolar mode, AIN+ can exceed AIN- by up to VREF. The
output format is straight binary. In bipolar mode, either input can exceed the other by up to V
two’s complement. In both modes, the input common mode range can go from GND to V
Figure 20. Single Conversion – AIN2 vs. GND (AS1525), Bipolar Mode AIN+ vs. AIN- (AS1524)
Note: In unipolar and bipolar modes, AIN+ and AIN- must not exceed V
If unipolar mode is selected
cuitry in track mode with AIN+ and AIN- connected to the input capacitors. Hold CNVST high for
the signal. Drive CNVST low to place the track/hold circuitry in hold mode. The AS1524 then performs a conversion
and shutdown automatically. The MSB is available at DOUT after 3.7µs. Data can then be clocked out using SCLK.
Clock out all 12 bits of data before driving CNVST high for the next conversion. If all 12 bits of data are not clocked out
before CNVST is driven high, bipolar mode is selected for the next conversion.
If bipolar mode is selected
30ns and then high again. This places the track/hold circuitry in track mode with AIN+ and AIN- connected to the input
capacitors.
Next hold CNVST high for
mode. The AS1524 then performs a conversion and shuts down automatically. The MSB is available at DOUT after
3.7µs. Data can then be clocked out using SCLK.
Note: If all 12 bits of data are not clocked out before CNVST is driven high, bipolar mode is selected for the next con-
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CNVST
CNVST
DOUT
DOUT
SCLK
SCLK
by more than 50mV.
version.
t
ACQ
High Z
High Z
t
ACQ
(see Figure
t
CONV
t
CONV
tACQ
(see Figure
(see Figure
20), drive CNVST high for at least 30ns. Next, drive CNVST low for at least 30ns, and
MSB
MSB
B11
B11
to fully acquire the signal. Drive CNVST low to place the track/hold circuitry in hold
1
1
B10
B10
20), drive CNVST high for at least 30ns. Next, drive CNVST low for at least
19), drive CNVST high to power up the AS1524 and place the track/hold cir-
Sampling Instant
B9
B9
Sampling Instant
B8
B8
4
4
Revision 1.02
tACQ
B7
B7
to fully acquire the signal. Drive CNVST low to place the
B6
B6
B5
B5
DD
B4
B4
by more than 50mV or be lower than GND
8
8
B3
B3
B2
B2
DD
REF/2
.
B1
B1
. The output format is
tACQ
LSB
LSB
B0
B0
12
12
to fully acquire
(see page
High Z
High Z
12 - 22
3).