MAX105ECS+T Maxim Integrated Products, MAX105ECS+T Datasheet - Page 15

• Manufacturer Part Number: MAX105ECS+T
• Description: IC ADC 6BIT 800MSPS DL 80TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX105ECS+T

• Number Of Bits: 6
• Sampling Rate (per Second): 800M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 2.6W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 7. Output Timing Relationship Between CLK and DREADY Signals and Primary/Auxiliary Output Ports
demultiplexed outputs are presented in dual 6-bit two’s
complement format with two consecutive samples in
the primary and auxiliary output ports on the rising
edge of the data ready clock. The auxiliary data port
always contains the older sample. The primary output
always contains the most recent data sample, regard-
less of the DREADY clock phase.
timing and data alignment of the auxiliary and primary
output ports in relationship with the CLK and DREADY
signals. Data in the primary port is delayed by five
clock cycles while data in the auxiliary port is delayed
by six clock cycles.
DATA PORT
DATA PORT
AUXILIARY
DREADY+
DREADY-
PRIMARY
DREADY
NOTE: THE LATENCY TO THE PRIMARY PORT IS FIVE CLOCK CYCLES, THE LATENCY TO THE AUXILIARY PORT IS SIX CLOCK
CLK+
CLK-
CLK
CYCLES. BOTH PRIMARY AND AUXILIARY DATA PORTS ARE UPDATED ON THE RISING EDGE OF THE DREADY+ CLOCK.
______________________________________________________________________________________
N
Dual, 6-Bit, 800Msps ADC with On-Chip,
ADC SAMPLE
N+1
N+2
N+3
Figure 7 shows the
N+4
AUXILIARY PORT DATA
PRIMARY PORT DATA
MAX105 ADCs SAMPLE ON THE RISING EDGE OF CLK+
N+5
N+6
CLK+
CLK-
t
PWH
N+7
N+1
N
N+8
Wideband Input Amplifier
N+9
N+2
N+3
t
PD1
t
Quadrature amplitude modulation (QAM) is frequently
used in digital communication systems to increase
channel capacity. A QAM signal is modulated in both
amplitude and phase. With a demodulator, this QAM
signal gets downconverted and separated in its in-
phase (I) and quadrature (Q) components. Both I&Q
channels are digitized by an ADC at the baseband
level in order to recover the transmitted information.
Figure 8 shows a typical application circuit to directly
tune L-band signals to baseband, incorporating a
direct conversion tuner (MAX2108) and the MAX105 to
digitize I&Q channels with excellent phase- and gain-
matching. A front-end L-C filter is required for anti-alias-
ing purposes.
PD2
N+10 N+11
t
PWL
N+4
N+5
N+12
DREADY +
DREADY -
N+13
N+6
N+7
N+14
N+8
N+9
N+15
Typical I/Q Application
N+16 N+17 N+18
MAX105
N+10
N+11
N+19
15