AD9228BCPZ-40 Analog Devices Inc, AD9228BCPZ-40 Datasheet - Page 11

• Manufacturer Part Number: AD9228BCPZ-40
• Description: IC ADC LVDS 12BIT QUAD 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9228BCPZ-40

• Data Interface: Serial, SPI™
• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Number Of Converters: 4
• Power Dissipation (max): 367mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Resolution (bits): 12bit
• Sampling Rate: 40MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9228-65EBZ - BOARD EVAL FOR AD9228
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin No.
0
1, 2, 5, 6, 9, 10, 27, 32,
35, 36, 39, 45, 46
11, 26
12, 25
3
4
7
8
13
14
15
16
17
18
19
20
21
22
23
24
28
29
30
31
Mnemonic
AGND
AVDD
DRGND
DRVDD
VIN − D
VIN + D
CLK−
CLK+
D − D
D + D
D − C
D + C
D − B
D + B
D − A
D + A
FCO−
FCO+
DCO−
DCO+
SCLK/DTP
SDIO/ODM
CSB
PDWN
DRGND
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO ANALOG GROUND.
DRVDD
VIN + D
VIN – D
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
CLK–
CLK+
10
11
12
1
2
3
4
5
6
7
8
9
Figure 5. 48-Lead LFCSP Pin Configuration, Top View
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Description
Analog Ground (Exposed Paddle)
1.8 V Analog Supply
Digital Output Driver Ground
1.8 V Digital Output Driver Supply
ADC D Analog Input Complement
ADC D Analog Input True
Input Clock Complement
Input Clock True
ADC D Digital Output Complement
ADC D Digital Output True
ADC C Digital Output Complement
ADC C Digital Output True
ADC B Digital Output Complement
ADC B Digital Output True
ADC A Digital Output Complement
ADC A Digital Output True
Frame Clock Output Complement
Frame Clock Output True
Data Clock Output Complement
Data Clock Output True
Serial Clock/Digital Test Pattern
Serial Data IO/Output Driver Mode
Chip Select Bar
Power-Down
Rev. D | Page 11 of 56
AD9228
TOP VIEW
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
AVDD
VIN – A
VIN + A
AVDD
PDWN
CSB
SDIO/ODM
SCLK/DTP
AVDD
DRGND
DRVDD
AD9228