AD9219BCPZ-65 Analog Devices Inc, AD9219BCPZ-65 Datasheet - Page 2

• Manufacturer Part Number: AD9219BCPZ-65
• Description: IC ADC 10BIT QUAD 65MSPS 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9219BCPZ-65

• Data Interface: Serial, SPI™
• Number Of Bits: 10
• Sampling Rate (per Second): 65M
• Number Of Converters: 4
• Power Dissipation (max): 408mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Resolution (bits): 10bit
• Sampling Rate: 65MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9219-65EBZ - BOARD EVALUATION FOR AD9219AD9219-65EB - BOARD EVALUATION FOR AD9219
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9219
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Diagrams .............................................................................. 7
Absolute Maximum Ratings ............................................................ 9
Pin Configuration and Function Descriptions ........................... 10
Equivalent Circuits ......................................................................... 12
Typical Performance Characteristics ........................................... 14
Theory of Operation ...................................................................... 19
REVISION HISTORY
5/10—Rev. C to Rev. D
Updated Outline Dimensions ....................................................... 52
Changes to Ordering Guide .......................................................... 52
4/10—Rev. B to Rev. C
Changes to Table 16 ........................................................................ 33
Updated Outline Dimensions ....................................................... 52
7/07—Rev. A to Rev. B
Changes to Figure 2 and Figure 4 ................................................... 7
Changes to Table 17 ........................................................................ 50
5/07—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Changes to Logic Output (SDIO/ODM) Section ......................... 5
Added Endnote 3 to Table 3 ............................................................ 5
Changes to Pipeline Latency ........................................................... 6
Changes to Figure 2 to Figure 4 ...................................................... 7
Changes to Figure 10 ...................................................................... 12
Changes to Figure 15, Figure 23 to Figure 26 Captions ............ 14
Changes to Figure 16, Figure 37, Figure 39, and Figure 40 ....... 14
Added Figure 46 and Figure 47..................................................... 20
Change to Figure 50 ....................................................................... 21
Changes to Figure 51 ...................................................................... 21
Changes to Clock Duty Cycle Considerations Section .............. 22
Changes to Power Dissipation and
AC Specifications .......................................................................... 4
Digital Specifications ................................................................... 5
Switching Specifications .............................................................. 6
Thermal Impedance ..................................................................... 9
ESD Caution .................................................................................. 9
Rev. D | Page 2 of 52
Serial Port Interface (SPI) .............................................................. 30
Memory Map .................................................................................. 32
Evaluation Board ............................................................................ 36
Outline Dimensions ....................................................................... 52
Power-Down Mode Section .......................................................... 23
Changes to Figure 58 ...................................................................... 23
Changes to Figure 61 to Figure 63 Captions ............................... 25
Change to Table 8 ........................................................................... 25
Changes to Digital Outputs and Timing Section ....................... 26
Changes to Table 9 Endnote .......................................................... 26
Added Table 10 ............................................................................... 27
Deleted Figure 62 and Figure 63 .................................................. 27
Changes to RBIAS Pin Section ..................................................... 28
Changes to Figure 67 ...................................................................... 29
Changes to Hardware Interface Section ...................................... 30
Added Figure 68 ............................................................................. 31
Changes to Table 15 ....................................................................... 31
Changes to Reading the Memory Map Table Section ............... 32
Changes to Output Signals Section .............................................. 36
Changes to Figure 71 ...................................................................... 36
Changes to Default Operation and
Jumper Selection Settings Section ................................................ 37
Changes to Alternative Analog Input
Drive Configuration Section ......................................................... 38
Changes to Figure 74 ...................................................................... 40
Changes to Table 17 ....................................................................... 48
Changes to Ordering Guide .......................................................... 52
4/06—Revision 0: Initial Version
Analog Input Considerations ................................................... 19
Clock Input Considerations ...................................................... 22
Hardware Interface ..................................................................... 30
Reading the Memory Map Table .............................................. 32
Reserved Locations .................................................................... 32
Default Values ............................................................................. 32
Logic Levels ................................................................................. 32
Power Supplies ............................................................................ 36
Input Signals................................................................................ 36
Output Signals ............................................................................ 36
Default Operation and Jumper Selection Settings ................. 37
Alternative Analog Input Drive Configuration...................... 38
Ordering Guide .......................................................................... 52