AD7294BSUZ Analog Devices Inc, AD7294BSUZ Datasheet - Page 21

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AD7294BSUZ

Manufacturer Part Number
AD7294BSUZ
Description
IC ADC 12BIT W/DAC/TEMP 64TQFP
Manufacturer
Analog Devices Inc
Type
ADC, DACr
Datasheet

Specifications of AD7294BSUZ

Resolution (bits)
12 b
Data Interface
Serial
Sampling Rate (per Second)
22.22k
Voltage Supply Source
Analog and Digital
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Sampling Rate
22.22kSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Digital
4.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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signal so that it is correctly formatted for the ADC. Figure 36
shows a typical connection diagram when operating the ADC
in single-ended mode.
Differential Mode
The AD7294 can have two differential analog input pairs.
Differential signals have some benefits over single-ended
signals, including noise immunity based on the common-
mode rejection of the device and improvements in distortion
performance. Figure 37 defines the fully differential analog
input of the AD7294.
The amplitude of the differential signal is the difference
between the signals applied to V
pair (V
complement format in the result register. Simultaneously drive
V
V
phase. Assuming the 0 V to V
of the differential signal is, therefore, −V
peak (2 × V
The common mode is the average of the two signals
The common mode is, therefore, the voltage on which the two
inputs are centered.
This results in the span of each input being V
voltage has to be set up externally, and its range varies with the
reference value, V
mode range decreases. When driving the inputs with an amplifier,
the actual common-mode range is determined by the output
voltage swing of the amplifier.
IN
REF
+1.25V
–1.25V
0 and V
, depending on the range chosen), that are 180° out of
(V
0V
IN+
IN+
COMMON-MODE
− V
+ V
Figure 36. Single-Ended Mode Connection Diagram
IN
REF
1 by two signals, each of amplitude V
VOLTAGE
IN−
IN−
), regardless of the common mode (V
Figure 37. Differential Input Definition
). The resulting converted data is stored in twos
)/2
REF
1
V
ADDITIONAL PINS OMITTED FOR CLARITY.
IN
. As the value of V
1
ADDITIONAL PINS OMITTED FOR CLARITY.
3R
R
R
REF
V
V
REF
REF
R
IN+
range is selected, the amplitude
p-p
p-p
and V
+2.5V
REF
0V
REF
increases, the common-
V
AD7294
V
IN−
IN+
IN–
V
V
to +V
IN
IN
in each differential
CM
0
3
REF
± V
AD7294
1
REF
REF
OUT
CM
REF
peak-to-
(or 2 ×
).
0.47µF
ADC
/2. This
1
Rev. F | Page 21 of 48
The common mode must be in this range to guarantee the
functionality of the AD7294.
When a conversion takes place, the common mode is rejected,
resulting in a virtually noise-free signal of amplitude −V
+V
+2047 in twos complement format.
If the 2 × V
from −2 ×V
V
Driving Differential Inputs
The differential modes available on V
require that V
equal signals that are 180° out of phase. The common mode on
which the analog input is centered must be set up externally. The
common-mode range is determined by V
and the particular amplifier used to drive the analog inputs.
Differential modes of operation with either an ac or dc input
provide the best THD performance over a wide frequency
range. Because not all applications have a signal preconditioned
for differential operation, there is often a need to perform a single-
ended-to-differential conversion.
Using an Op Amp Pair
An op amp pair can be used to directly couple a differential signal
to one of the analog input pairs of the AD7294. The circuit con-
figurations illustrated in Figure 38 show how a dual op amp can
be used to convert a single-ended bipolar signal into a differential
unipolar input signal.
The voltage applied to Point A sets up the common-mode voltage.
As shown in Figure 38, Point A connects to the reference, but any
value in the common-mode range can be the input at Point A to
set up the common mode. The AD8022 is a suitable dual op amp
that can be used in this configuration to provide differential
drive to the AD7294.
Care is required when choosing the op amp because the selection
depends on the required power supply and system performance
objectives. The driver circuits in Figure 38 are optimized for dc
coupling applications requiring best distortion performance.
The differential op amp driver circuit shown in Figure 38 is
configured to convert and level shift a single-ended, ground
referenced (bipolar) signal to a differential signal centered at the
V
IN+
REF
REF
= V
level of the ADC.
, corresponding to the digital output codes of −2048 to
REF
).
REF
REF
IN+
range is used, the input signal amplitude extends
(V
and V
IN+
= 0 V, V
IN−
be driven simultaneously with two
IN−
= V
REF
IN
) to +2 × V
0 to V
REF
, the power supply,
IN
3 in Table 13
REF
AD7294
(V
IN−
REF
= 0 V,
to

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