LTC1294CCSW#TRPBF Linear Technology, LTC1294CCSW#TRPBF Datasheet - Page 13
LTC1294CCSW#TRPBF
Manufacturer Part Number
LTC1294CCSW#TRPBF
Description
IC DATA ACQ SYSTEM 12BIT 20-SOIC
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS), ADCr
Datasheet
1.LTC1296CCSWPBF.pdf
(28 pages)
Specifications of LTC1294CCSW#TRPBF
Resolution (bits)
12 b
Sampling Rate (per Second)
46.5k
Data Interface
Serial, Parallel
Voltage Supply Source
Dual ±
Voltage - Supply
±5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Example 2: The same conditions as Example 1 except
COM = 1V. The resulting input span is 1V ≤ IN
if IN
then the resulting D
Example 3: Let V
and COM = 1V. Bipolar mode of operation. The resulting
input span is –2V ≤ IN
For differential input configurations with the same condi-
tions as in the above three examples the resulting input
spans are as follows:
Example 1 (Diff.): IN
Example 2 (Diff.): IN
Example 3 (Diff.): IN
D
MSB-FIRST DATA (MSBF = 0)
A
D
CLK
D
CLK
OUT
MSB-FIRST DATA (MSBF = 1)
OUT
D
CS
IN
CS
IN
PPLICATI
+
≥ 4V the resulting D
HI-Z
START
START
SGL/
DIFF
SGL/
DIFF
O
CC
ODD/
SIGN
ODD/
SIGN
SEL1
t
t
= 5V, V
SMPL
SEL1
SMPL
OUT
U
–
–
–
HI-Z
SEL0
S
SEL0
+
≤ IN
≤ IN
– 3V ≤ IN
word is all 0’s.
≤ 4V.
UNI
UNI
I FOR ATIO
OUT
–
MSBF
U
MSBF
+
+
= –5V, REF
≤ IN
≤ IN
word is all 1’s. If IN
PS
PS
+
–
–
Example: Differential Inputs (CH4
≤ IN
+ 3V.
+ 3V.
B11
B11
W
+
–
= 4V, REF
+ 3V.
+
≤ 4V. Note
t
CONV
t
U
CONV
+
Operating Sequence
–
≤ 1V
= 1V
t
CYC
t
CYC
MSB-First/LSB-First (MSBF)
The output data of the LTC1293/4/6 is programmed for
MSB-first or LSB-first sequence using the MSB bit. When
the MSBF bit is a logical one, data will appear on the D
line in MSB-first format. Logical zeroes will be filled in
indefinitely following the last data bit to accommodate
longer word lengths required by some microprocessors.
When the MSBF bit is a logical zero, LSB first data will
follow the normal MSB first data on the D
bipolar mode the sign bit will fill in after the MSB bit for
MSBF = 0 (see Operating Sequence).
Power Shutdowns (PS)
The power shutdown feature of the LTC1293/4/6 is acti-
vated by making the PS bit a logical zero. If CS remains low
after the PS bit has been received, a 12-bit D
B1
+
B1 B0 B1
, CH5
B0
DON'T CARE
DON'T CARE
–
LTC1293/LTC1294/LTC1296
), Unipolar Mode
FILLED WITH ZEROES
B11
FILLED WITH
ZEROES
OUT
OUT
line. In the
DON'T
CARE
DON'T
word with
CARE
13
LTC1293 AI05
129346fs
OUT