AD7729AR-REEL7 Analog Devices Inc, AD7729AR-REEL7 Datasheet
AD7729AR-REEL7
Specifications of AD7729AR-REEL7
Related parts for AD7729AR-REEL7
AD7729AR-REEL7 Summary of contents
Page 1
FEATURES +3 V Supply Voltage Baseband Serial Port (BSPORT) Differential IRx and QRx ADC Channels Two 15-Bit Sigma-Delta A/D Converters FIR Digital Filters 64 dB SNR Output Word Rate 270.83 kHz Twos Complement Coding On-Chip Offset Calibration Power-Down Mode ...
Page 2
AD7729–SPECIFICATIONS MHz; RxPOWER1 = 0; RxPOWER0 = 1; MCLKDIV = 0; T CLK Parameter AD7729A REFERENCE REFCAP Absolute Voltage, V 1.3 REFCAP REFCAP TC 50 REFOUT Absolute Voltage, V 1.3 REFOUT REFOUT TC 50 ADC ...
Page 3
Parameter LOGIC INPUTS V , Input High Voltage INH V , Input Low Voltage INL I , Input Current Input Capacitance IN LOGIC OUTPUTS V , Output High Voltage Output Low Voltage OL I ...
Page 4
AD7729 Table II. Receive Section Signal Ranges Baseband Section Signal Range V 1 REFCAP V 1.3 V 10% REFOUT ADC ADC Signal Range 2 V REFCAP V BIAS Differential Input (AVDD1 – V REFCAP Single-Ended ...
Page 5
TIMING DIAGRAMS Figure 2. Clock Timing 100 OUTPUT PIN C L 15pF I 100 A OH Figure 3. Load Circuit for Timing Specifications ASE (I) THREE-STATE ASCLK ( ASDIFS (I) ...
Page 6
... Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Temperature Model Range AD7729AR – +105 C Small Outline IC AD7729ARU – +105 C Thin Shrink Small RU-28 PIN CONFIGURATION IRxP 1 IRxN 2 QRxP 3 QRxN ...
Page 7
Pin Number Mnemonic 15 MCLK 13 RESETB Power Supply 6 AVDD1 5 AVDD2 7 AGND 25 DVDD1 24 DVDD2 23 DGND Analog Signal and Reference 1, 2 IRxP, IRxN 3, 4 QRxP, QRxN 26 AUXDAC 28 REFCAP 27 REFOUT Auxiliary ...
Page 8
AD7729 TERMINOLOGY Absolute Group Delay Absolute group delay is the rate of change of phase versus fre- quency, dø/df expressed in microseconds. Differential Nonlinearity This is the difference between the measured and the ideal 1 LSB change between ...
Page 9
FUNCTIONAL DESCRIPTION BASEBAND CODEC Receive Section The receive section consists of I and Q receive channels, each comprising of a simple switched-capacitor filter followed by a 15-bit sigma-delta ADC. On-board digital filters, which form part of the sigma-delta ADCs, also ...
Page 10
AD7729 BIAS REF IRxN QRxN V BIAS IRxP QRxP V – BIAS REF 10 ... 00 00 ... 00 ADC CODE Figure 11. ADC Transfer Function for Differential Operation BIAS REF ...
Page 11
FREQUENCY – kHz Figure 14. Digital Filter Frequency Response Filter Characteristics The digital filter is a 288-tap FIR filter, clocked at half ...
Page 12
AD7729 Figure 18 shows a flow diagram for calibration of the receive section. 0 RxON 1 1 RxAUTOCAL 1 0 RxEXTCAL CONNECT ADC INPUTS SHORT ADC INPUTS COUNTER RESETS TO 36 (36 48 MCLKs) TO ALLOW FOR FILTER SETTLING TIME ...
Page 13
Table IV. Baseband and Auxiliary Registers Name R/W Address Reserved 000000 (0) Reserved 000001 (1) Reserved 000010 (2) IRxOFFSET R/W 000011 (3) QRxOFFSET R/W 000100 (4) Reserved 000101 (5) Reserved 000110 (6) RxDELAY1 R/W 000111 (7) RxDELAY2 R/W 001000 (8) ...
Page 14
AD7729 Table VIII. Baseband Control Register B (BCRB) Bit Name Function BCRB0 Reserved BCRB1 Reserved BCRB2 RU REFOUT Use. BCRB3 LP Reference Low Power. BCRB4 RxSPORTSEL Selects the SPORT that will provide RxDATA when RxON is asserted. When set to ...
Page 15
ADSP-21xx DR RFS SCLK TFS DT Figure 21. AD7729 to ADSP-21xx Interface AD7729-to-TMS320C5x Interface Figure 22 shows the interface between the AD7729 and the TMS320C5x DSP. The TMS320C5x is configured as follows: MCM = 0 (CLKX is an input), TXM ...
Page 16
AD7729 0.0118 (0.30) 0.0040 (0.10) 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead Small Outline (SOIC) (R-28) 0.7125 (18.10) 0.6969 (17.70 PIN 1 0.1043 (2.65) 0.0926 (2.35) 0.0500 0.0192 ...