TDA8754HL/17/C1,55 NXP Semiconductors, TDA8754HL/17/C1,55 Datasheet - Page 27

• Manufacturer Part Number: TDA8754HL/17/C1,55
• Description: IC TRPL 8BIT VIDEO ADC 144LQFP
• Manufacturer: NXP Semiconductors
• Type: Video ADCr

Specifications of TDA8754HL/17/C1,55

• Package / Case: 144-LQFP
• Resolution (bits): 8 b
• Sampling Rate (per Second): 270M
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current: 180 mA
• Maximum Operating Temperature: + 70 C
• Maximum Power Dissipation: 1.3 W
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-2058; 935272703551; TDA8754HL17BE-S

Philips Semiconductors
Table 26:
Table 27:
Table 28:
9397 750 14984
Product data sheet
Bit
7
6
5
4
3
2
1 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
SOG - sync-on-green register (address 09h) bit allocation
SOG - sync-on-green register (address 09h) bit description
PLLCTRL- PLL control register (address 0Ah) bit allocation
Symbol
DO
UP
FTRILEVEL
STRILEVEL
CKREFS
SOGSEL
SOGI[1:0]
9.6 Sync-on-green register
9.7 PLL control register
DO
IP1
W
7
0
W
7
0
Description
test bit for forcing charge pump current down
test bit for forcing charge pump current up
defines the 3-level function mode
forces the state of 3-level function
enables the PLL Ckref signal to be selected
enables the reference PLL between HSYNC input and SOG input to be selected
defines the SOG charge pump current; values are given in % of sync pulse/line length
UP
W
0 = reset value
1 = forcing down
0 = reset value
1 = forcing up
0 = automatic 3-level
1 = level selection with bit STRILEVEL
0 = not 3-level mode
1 = 3-level mode
0 = same as input
1 = input inverted
0 = HSYNC input
1 = SOG input
00 = 14.8 % maximum (TV standards) and non-VESA standards
01 = 12.6 % maximum (all standards)
10 = 8.6 % maximum (HDTV standards) and non-VESA standards
11 = 0 test mode
IP0
6
0
W
6
1
FTRILEVEL STRILEVEL
W
5
0
Z2
W
5
0
Rev. 06 — 16 June 2005
W
Z1
4
0
W
4
1
CKREFS
Z0
W
W
3
0
3
1
Triple 8-bit video ADC up to 270 Msps
SOGSEL
DR2
W
W
2
1
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SOGI1
DR1
W
1
0
TDA8754
W
1
0
SOGI0
DR0
W
W
0
0
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0
1