AD5280BRUZ20 Analog Devices Inc, AD5280BRUZ20 Datasheet - Page 15
![IC DGTL POT 15V 20K 14-TSSOP](/photos/6/60/66047/ru-14_sml.jpg)
AD5280BRUZ20
Manufacturer Part Number
AD5280BRUZ20
Description
IC DGTL POT 15V 20K 14-TSSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5280BRUZ50.pdf
(28 pages)
Specifications of AD5280BRUZ20
Temperature Coefficient
30 ppm/°C Typical
Taps
256
Resistance (ohms)
20K
Number Of Circuits
1
Memory Type
Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 16.5 V, ±4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
20K
End To End Resistance
20kohm
No. Of Steps
256
Resistance Tolerance
± 30%
Control Interface
Serial, I2C, 2-Wire
No. Of Pots
Single
Potentiometer Ic Case
RoHS Compliant
Supply Voltage Range
± 4.5V To ± 5.5V, 4.5V To 16.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5280BRUZ20
Manufacturer:
Analog Devices Inc
Quantity:
135
Part Number:
AD5280BRUZ20
Manufacturer:
ADI/亚德诺
Quantity:
20 000
input voltage applied to Terminal A and Terminal B is
For a more accurate calculation that includes the effect of wiper
resistance, V
Table 6. Serial Format of Data Accepted from the I
S
where:
Abbreviation
S
P
A
X
AD1, AD0
R/W
A/B
RS
SD
O , O
D7, D6, D5, D4, D3, D2, D1, D0
2
START BY
MASTER
0
SDA
V
V
1
SCL
W
W
1
( )
( )
D
D
0
=
=
W
Slave Address Byte
can be found as
256
R
D
1 1
WB
0
R
1
AB
V
( )
D
A
START BY
1
MASTER
+
SLAVE ADDRESS BYTE
AD1
V
SDA
SCL
256 −
A
0
256
+
FRAME 1
R
1
WA
AD
0
D
R
AB
V
( )
D
B
1 AD1
1
Figure 46. Reading Data from a Previously Selected RDAC Register in Write Mode
0
Midscale reset, active high (only affects selected channel)
Equals
Start condition
Stop condition
Acknowledge
Don’t care
Package pin programmable address bits
Read enable at high and write enable at low
RDAC subaddress select; 0 = RDAC1 and 1 = RDAC2
Shutdown; same as SHDN pin operation except inverse logic (only affects selected channel)
Output logic pin latched values; default Logic 0
Data bits
V
R/
W
B
1
AD0
SLAVE ADDRESS BYTE
0
A
R/W
AD5280/5282
FRAME 1
ACK. BY
A /B
1
9
1
Figure 45. Writing to the RDAC Register
A/B
2
RS
C Bus
AD1 AD0 R/W
1
Instruction Byte
RS
S
D
Rev. C | Page 15 of 28
(3)
(4)
INSTRUCTION BYTE
SD
AD5280/AD5282
O
FRAME 2
ACK. BY
1
O1
9
O
O2
DATA BYTE FROM PREVIOUSLY SELECTED
2
D7
Operation of the digital potentiometer in divider mode results
in a more accurate operation over temperature. Unlike rheostat
mode, the output voltage is dependent mainly on the ratio of
the internal resistors R
values; therefore, the temperature drift reduces to 5 ppm/°C.
1
X
X X X
D6
X
D5
AD5280/AD5282
X
FRAME 2
ACK. BY
D4
A
9
D3
D7
D7
1
D2
D6
D6
WA
D1
and R
D5
D0
NO ACK. BY
DATA BYTE
D
5
FRAME 3
MASTER
D4
9
WB
A
9
Data Byte
STOP BY
MASTER
D
4
D3
and not on the absolute
D2
AD5280/AD5282
D
3
D1
D
2
AD5280/5282
D0
ACK. BY
D
1
STOP BY
MASTER
D
0
A
P