MCP4551-103E/MS Microchip Technology, MCP4551-103E/MS Datasheet - Page 58

• Manufacturer Part Number: MCP4551-103E/MS
• Description: IC POT DGTL 10K 257TAPS 8-MSOP
• Manufacturer: Microchip Technology

Specifications of MCP4551-103E/MS

• Taps: 257
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 150 ppm/°C Typical
• Memory Type: Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Resistance In Ohms: 10K
• End To End Resistance: 100kohm
• Track Taper: Linear
• No. Of Steps: 256
• Resistance Tolerance: ± 20%
• Supply Voltage Range: 2.7V To 5.5V
• Control Interface: I2C, Serial
• No. Of Pots: Single
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP453X/455X/463X/465X
7.5
The Read Command can be issued to both the Volatile
and Non-Volatile memory locations. The format of the
command, see
I
MCP4XXX Command Byte, A bit, followed by a
Repeated Start bit, I
“1”), and the MCP4XXX transmitting the requested
Data High Byte, and A bit, the Data Low Byte, the Mas-
ter generating the A, and Stop condition.
The I
logic one (R/W = 1) to generate a read sequence. The
memory location read will be the last address
contained in a valid write MCP4XXX Command Byte or
address 00h if no write operations have occurred since
the device was reset (Power-on Reset or Brown-out
Reset).
Read operations initially include the same address byte
sequence as the write sequence (shown in
This sequence is followed by another control byte
(including the Start condition and Ackowledge) with the
R/W bit equal to a logic one (R/W = 1) to indicate a
read. The MCP4XXX will then transmit the data con-
tained in the addressed register. This is followed by the
master generating an A bit in preparation for more data,
or an A bit followed by a Stop. The sequence is ended
with the master generating a Stop or Restart condition.
The internal address pointer is maintained.
DS22096A-page 58
2
C Control Byte (with R/W bit set to “0”), A bit,
2
C Control Byte requires the R/W bit equal to a
Read Data
Normal and High Voltage
Figure
2
C Control Byte (with R/W bit set to
7-4, includes the Start condition,
Figure
6-9).
7.5.1
Figure 7-4
For single reads the master sends a STOP or
RESTART condition after the data byte is sent from the
slave.
7.5.1.1
Figure 7-5
Refer to
sequence.
7.5.2
Continuous reads allows the devices memory to be
read quickly. Continuous reads are possible to all mem-
ory locations. If a non-volatile memory write cycle is
occurring, then Read commands may only access the
volatile memory locations.
Figure 7-6
reads.
For continuous reads, instead of transmitting a Stop
or Restart condition after the data transfer, the master
reads the next data byte. The sequence ends with the
master Not Acknowledging and then sending a Stop or
Restart.
7.5.3
The High Voltage Command (HVC) signal is
multiplexed with Address 0 (A0) and is used to indicate
that the command, or sequence of commands, are in
the High Voltage mode. High Voltage commands allow
the device’s WiperLock Technology and write protect
features to be enabled and disabled.
The HVC pin has an internal resistor connection to the
MCP4XXXs internal V
7.5.4
The MCP4XXX expects to receive entire, valid I
commands and will assume any command not defined
as a valid command is due to a bus corruption and will
enter a passive high condition on the SDA signal. All
signals will be ignored until the next valid Start
condition and Control Byte are received.
IGNORING AN I
“FALLING OFF” THE BUS
show the waveforms for a single read.
shows the sequence for a Random Reads.
shows the sequence for three continuous
Figure 7-5
SINGLE READ
CONTINUOUS READS
THE HIGH VOLTAGE COMMAND
(HVC) SIGNAL
Random Read
DD
for the random byte read
© 2008 Microchip Technology Inc.
signal.
2
C TRANSMISSION AND
2
C