MCP4641-103E/ST Microchip Technology, MCP4641-103E/ST Datasheet - Page 59

• Manufacturer Part Number: MCP4641-103E/ST
• Description: IC DGTL POT 10K 256TAPS 14-TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP4641-103E/ST

• Taps: 129
• Resistance (ohms): 10K
• Number Of Circuits: 2
• Temperature Coefficient: 150 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 10K
• End To End Resistance: 100kohm
• Track Taper: Linear
• Resistance Tolerance: ± 20%
• No. Of Steps: 128
• Supply Voltage Range: 2.7V To 5.5V
• Control Interface: I2C, Serial
• No. Of Pots: Dual
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 7-4:
FIGURE 7-5:
© 2008 Microchip Technology Inc.
S
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
0 1 0
0 1 0
Fixed
Address
S
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
3: The MCP45xx/46xx retains the last “Device Memory Address” that it has received. This is the
4: The Device Memory Address pointer defaults to 00h on POR and BOR conditions.
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
3: The MCP45XX/46XX retains the last “Device Memory Address” that it has received. This is
0 1 0
Control Byte
Fixed
Address
abort this transfer and release the bus.
Master Device can generate a Stop or Repeated Start condition.
MCP45XX/46XX does not “corrupt” the “Device Memory Address” after Repeated Start or
Stop conditions.
abort this transfer and release the bus.
Master Device can generate a Stop or Repeated Start condition.
the MCP45XX/46XX does not “corrupt” the “Device Memory Address” after Repeated Start or
Stop conditions.
Control Byte
1
I
Control Byte
1
I
2
2
C Read (Last Memory Address Accessed).
C Random Read.
A2 A1 A0 1 A
Variable
Address
A2 A1 A0 1
1
A2 A1 A0 0
Variable
Address
Read bit
Read bit
A
Write bit
0
0
A
0
0
AD AD AD AD
3
MCP453X/455X/463X/465X
0
Device
Memory
Address
0
2
READ Command
0
0
1
0
0
0
0
0
Command
1
0 D8 A
0 D8 A
1
Read bits
x X A Sr
Read bits
1
1
D7 D6 D5 D4
Read Data bits
D7 D6 D5 D4
Read Data bits
Repeated Start bit
D3
D3
D2 D1 D0 A
D2 D1 D0 A
DS22096A-page 59
STOP bit
STOP bit
2
2
P
P