AD5242BRU10-REEL7 Analog Devices Inc, AD5242BRU10-REEL7 Datasheet - Page 7

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AD5242BRU10-REEL7

Manufacturer Part Number
AD5242BRU10-REEL7
Description
IC DGTL POT 256POS 16-TSSOP T/R
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5242BRU10-REEL7

Rohs Status
RoHS non-compliant
Taps
256
Resistance (ohms)
10K
Number Of Circuits
2
Temperature Coefficient
30 ppm/°C Typical
Memory Type
Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resistance In Ohms
10K
For Use With
EVAL-AD5242EBZ - BOARD EVALUATION FOR AD5242
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. AD5241 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Mnemonic
A
W
B
V
SHDN
SCL
SDA
AD0
AD1
DGND
V
O
NC
O
1
DD
SS
1
2
1
1
Figure 6. AD5241 Pin Configuration
SHDN
SDA
SCL
V
W
A
B
DD
1
1
1
NC = NO CONNECT
1
2
3
4
5
6
7
Serial Clock Input.
Common Ground.
No Connect.
Description
Resistor Terminal A
Wiper Terminal W
Resistor Terminal B
Positive Power Supply, Specified for
Operation from 2.2 V to 5.5 V.
Active low, asynchronous connection of
Wiper W to Terminal B, and open circuit
of Terminal A. RDAC register contents
unchanged. SHDN should tie to V
if not used.
Serial Data Input/Output.
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
Negative Power Supply, Specified for
Operation from 0 V to −2.7 V.
Logic Output Terminal O
Logic Output Terminal O
(Not to Scale)
AD5241
TOP VIEW
14
13
12
11
10
9
8
O
NC
O
V
DGND
AD1
AD0
SS
1
2
1
.
1
1
.
.
2
1
.
.
DD
Rev. C | Page 7 of 20
Table 5. AD5242 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
O
A
W
B
V
SHDN
SCL
SDA
AD0
AD1
DGND
V
O
B
W
A
1
DD
SS
2
1
2
1
2
1
2
Figure 7. AD5242 Pin Configuration
SHDN
SDA
SCL
V
W
O
A
B
DD
1
1
1
1
1
2
3
4
5
6
7
8
Description
Logic Output Terminal O
Resistor Terminal A
Wiper Terminal W
Resistor Terminal B
Positive Power Supply, Specified for
Operation from 2.2 V to 5.5 V.
Active Low, Asynchronous Connection
of Wiper W to Terminal B, and Open
Circuit of Terminal A. RDAC register
contents unchanged. SHDN should
tie to V
Serial Clock Input.
Serial Data Input/Output.
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
Programmable Address Bit for Multiple
Package Decoding. Bit AD0 and Bit AD1
provide four possible addresses.
Common Ground.
Negative Power Supply, Specified for
Operation from 0 V to −2.7 V.
Logic Output Terminal O
Resistor Terminal B
Wiper Terminal W
Resistor Terminal A
(Not to Scale)
AD5242
TOP VIEW
DD
, if not used.
16
15
14
13
12
10
11
9
AD5241/AD5242
A
W
B
O
V
DGND
AD1
AD0
SS
2
2
2
2
1
2
.
.
1
2
1
2
.
.
.
.
1
2
.
.

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