AD8400AR10 Analog Devices Inc, AD8400AR10 Datasheet - Page 12
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AD8400AR10
Manufacturer Part Number
AD8400AR10
Description
IC DGTL POT 8BIT 10K 1CH 8-SOIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD8400ARZ1.pdf
(32 pages)
Specifications of AD8400AR10
Rohs Status
RoHS non-compliant
Taps
256
Resistance (ohms)
10K
Number Of Circuits
1
Temperature Coefficient
500 ppm/°C Typical
Memory Type
Volatile
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Resistance In Ohms
10K
End To End Resistance
10kohm
Track Taper
Linear
No. Of Steps
256
Resistance Tolerance
± 20%
Supply Voltage Range
2.7V To 5.5V
Control Interface
Serial, SPI
No. Of Pots
Single
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8400AR10
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD8400AR100
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD8400/AD8402/AD8403
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 7. AD8400 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Table 8. AD8402 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
All AGND pins must be connected to DGND.
GND
Figure 6. AD8400 Pin Configuration
SDI
CS
B1
1
2
3
4
Mnemonic
B1
GND
CS
SDI
CLK
V
W1
A1
Mnemonic
AGND
B2
A2
W2
DGND
SHDN
CS
SDI
CLK
RS
V
W1
A1
B1
DD
DD
(Not to Scale)
AD8400
TOP VIEW
8
7
6
5
Description
Terminal B RDAC.
Ground.
Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded,
based on the address bits, and loaded into the target DAC register.
Serial Data Input.
Serial Clock Input, Positive Edge Triggered.
Positive Power Supply. Specified for operation at both 3 V and 5 V.
Wiper RDAC, Addr = 00
Terminal A RDAC.
Description
Analog Ground.
Terminal B RDAC 2.
Terminal A RDAC 2.
Wiper RDAC 2, Addr = 01
Digital Ground.
Terminal A Open Circuit. Shutdown controls Variable Resistor 1 and Variable Resistor 2.
Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded,
based on the address bits, and loaded into the target DAC register.
Serial Data Input.
Serial Clock Input, Positive Edge Triggered.
Active Low Reset to Midscale. Sets RDAC registers to 80
Positive Power Supply. Specified for operation at both 3 V and 5 V
Wiper RDAC 1, Addr = 00
Terminal A RDAC 1.
Terminal B RDAC 1.
A1
W1
V
CLK
DD
1
1
2
.
2
2
.
.
AGND
DGND
Figure 7. AD8402 Pin Configuration
SHDN
W2
CS
B2
A2
Rev. E | Page 12 of 32
1
2
3
4
5
6
7
(Not to Scale)
AD8402
TOP VIEW
14
13
12
11
10
9
8
B1
A1
W1
V
RS
CLK
SDI
DD
H
.
AGND2
AGND4
DGND
SHDN
Figure 8. AD8403 Pin Configuration
SDI
W2
W4
CS
B2
A2
B4
A4
10
12
11
1
2
3
4
5
6
7
8
9
(Not to Scale)
AD8403
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
B1
A1
W1
AGND1
B3
A3
W3
AGND3
V
RS
CLK
SDO
DD