LMZ23603TZ National Semiconductor, LMZ23603TZ Datasheet - Page 16

• Manufacturer Part Number: LMZ23603TZ
• Description: POWER MODULE, 36V, 3A, 7TO-PMOD
• Manufacturer: National Semiconductor

Specifications of LMZ23603TZ

• Primary Input Voltage: 36V
• No. Of Outputs: 1
• Output Voltage: 6V
• Output Current: 3A
• Voltage Regulator Case Style: TO-PMOD
• No. Of Pins: 7
• Operating Temperature Range: -40°C To +125°C
• Rohs Compliant: Yes

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uF 6.3V X5R ceramic. This combination provides excellent
performance that may exceed the requirements of certain ap-
plications. Additionally some small ceramic capacitors can be
used for high frequency EMI suppression.
C
The LMZ23603 module contains a small amount of internal
ceramic input capacitance. Additional input capacitance is re-
quired external to the module to handle the input ripple current
of the application. The input capacitor can be several capac-
itors in parallel. This input capacitance should be located in
very close proximity to the module. Input capacitor selection
is generally directed to satisfy the input ripple current require-
ments rather than by capacitance value. Input ripple current
rating is dictated by the equation:
I(C
where D
(As a point of reference, the worst case ripple current will oc-
cur when the module is presented with full load current and
when V
Recommended minimum input capacitance is 22uF X7R (or
X5R) ceramic with a voltage rating at least 25% higher than
the maximum applied input voltage for the application. It is
also recommended that attention be paid to the voltage and
temperature derating of the capacitor selected. It should be
noted that ripple current rating of ceramic capacitors may be
missing from the capacitor data sheet and you may have to
contact the capacitor manufacturer for this parameter.
If the system design requires a certain minimum value of
peak-to-peak input ripple voltage (ΔV
the following equation may be used.
C
If ΔV
this equals 120 mV and f
C
≥
Additional bulk capacitance with higher ESR may be required
to damp any resonant effects of the input capacitance and
parasitic inductance of the incoming supply lines. The
LMZ23603 typical applications schematic and evaluation
board include a 150 μF 50V aluminum capacitor for this func-
tion. There are many situations where this capacitor is not
necessary.
POWER DISSIPATION AND BOARD THERMAL
REQUIREMENTS
When calculating module dissipation use the maximum input
voltage and the average output current for the application.
Many common operating conditions are provided in the char-
acteristic curves such that less common applications can be
derived through interpolation. In all designs, the junction tem-
perature must be kept below the rated maximum of 125°C.
For the design case of V
T
from case to ambient of less than:
θ
Given the typical thermal resistance from junction to case to
be 1.9 °C/W. Use the 85°C power dissipation curves in the
Typical Performance Characteristics section to estimate the
P
it is 3W.
θ
CA
CA
AMB(MAX)
IN
IN
IN
IC-LOSS
22.3μF
IN(RMS)
≥
< (T
SELECTION
≥
= (125 – 85) / 3W – 1.9 = 11.4 (11)
IN
3A * 3.3V/12V * (1– 3.3V/12V) / (812000 * 0.240 V)
I
O
is 1% of V
IN
J-MAX
* D * (1–D) / f
for the application being designed. In this application
≊
)
= 2 * V
= 85°C, the module must see a thermal resistance
≊
V
O
1 /2 * I
– T
/ V
A-MAX
O
IN
IN
).
O
for a 12V input to 3.3V output application
* SQRT (D / 1-D) (8)
) / P
SW-CCM
SW
IN
IC-LOSS
= 24V, V
= 812 kHz.
* ΔV
- θ
IN
JC
(9)
O
IN
(10)
= 3.3V, I
) be maintained then
O
= 3A, and
16
To reach θ
effectively. With no airflow and no external heat, a good esti-
mate of the required board area covered by 2 oz. copper on
both the top and bottom metal layers is:
Board_Area_cm
As a result, approximately 44 square cm of 2 oz copper on
top and bottom layers is required for the PCB design. The
PCB copper heat sink must be connected to the exposed pad.
Approximately sixty, 10mil (254 μm) thermal vias spaced 39
mils (1.0 mm) apart connect the top copper to the bottom
copper. For an example of a high thermal performance PCB
layout for SIMPLE SWITCHER© power modules, refer to
AN-2085, AN-2125, AN-2020 and AN-2026.
PC BOARD LAYOUT GUIDELINES
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce and resistive voltage drop in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability. Good layout can be imple-
mented by following a few simple design rules.
1. Minimize area of switched current loops.
From an EMI reduction standpoint, it is imperative to minimize
the high di/dt paths during PC board layout as shown in the
figure above. The high current loops that do not overlap have
high di/dt content that will cause observable high frequency
noise on the output pin if the input capacitor (Cin1) is placed
at a distance away from the LMZ23603. Therefore place
C
exposed pad. This will minimize the high di/dt area and reduce
radiated EMI. Additionally, grounding for both the input and
output capacitor should consist of a localized top side plane
that connects to the PGND exposed pad (EP).
2. Have a single point ground.
The ground connections for the feedback, soft-start, and en-
able components should be routed to the AGND pin of the
device. This prevents any switched or load currents from
flowing in the analog ground traces. If not properly handled,
poor grounding can result in degraded load regulation or er-
ratic output voltage ripple behavior. Additionally provide the
single point ground connection from pin 4 (AGND) to EP/
PGND.
3. Minimize trace length to the FB pin.
Both feedback resistors, R
close to the FB pin. Since the FB node is high impedance,
maintain the copper area as small as possible. The traces
from R
LMZ23603 to minimize possible noise pickup.
IN1
as close as possible to the LMZ23603 VIN and PGND
FBT
, R
CA
FBB
= 11.4., the PCB is required to dissipate heat
2
should be routed away from the body of the
= 500°C x cm
Figure 3
FBT
and R
2
/W / θ
FBB
CA
(12)
should be located
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