DS1855B-010 Maxim Integrated Products, DS1855B-010 Datasheet - Page 4
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DS1855B-010
Manufacturer Part Number
DS1855B-010
Description
IC POT/MEM DIG NV 10/10K 16BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1855E-010.pdf
(20 pages)
Specifications of DS1855B-010
Taps
100, 256
Resistance (ohms)
10K
Number Of Circuits
2
Temperature Coefficient
750 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-CSBGA
Resistance In Ohms
10K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS1855B-010
Manufacturer:
Maxim Integrated
Quantity:
10 000
Company:
Part Number:
DS1855B-010+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Company:
Part Number:
DS1855B-010+T&R
Manufacturer:
Maxim Integrated
Quantity:
10 000
Company:
Part Number:
DS1855B-010/T
Manufacturer:
TI
Quantity:
119
Company:
Part Number:
DS1855B-010/T&R
Manufacturer:
Maxim Integrated
Quantity:
10 000
MEMORY ORGANIZATION
The DS1855’s serial EEPROM is internally organized with 256 words of 1 byte each. Each word requires
an 8-bit address for random word addressing. The byte at address F9h determines the wiper setting for
potentiometer 0, which contains 100 positions. Writing values above 63h to this address sets the wiper to
its uppermost position, but the MSB is ignored. The byte at address F8h determines the wiper setting for
potentiometer 1, which contains 256 positions (00h to FFh). Address locations FAh though FFh are
reserved and should not be written.
MEMORY
LOCATION
00h – F7h
F8h
F9h
FAh
User Memory
Potentiometer 1 Setting Writing to this byte controls the setting of potentiometer 1, a 256-
Potentiometer 0 Setting Writing to this byte controls the setting of potentiometer 0, a 100-
Software Lock
Configuration Byte
LOCATION
MEMORY
NAME OF
FUNCTION OF MEMORY LOCATION
General-purpose user memory.
position pot. Valid settings are 00h to FFh.
position pot. Valid settings are 00h to 63h. MSB is ignored.
The three lower bits in this byte can be used to set write-protection
to the 256-byte memory block.
B2: Writing this bit to a 1 protects the upper page of memory. If
this bit is set, memory locations F8h to FFh are configured for
write-protection.
B1: Writing this bit to a 1 protects the upper block of memory. If
this bit is set, memory locations 80h to F7h are configured for
write-protection. The upper page must be unlocked in order to
modify the locking of this portion of memory.
B0: Writing this bit to a 1 protects the lower block of memory. If
this bit is set, memory locations 00h to 7Fh are configured for
write-protection. The upper page must be unlocked in order to
modify the locking of this portion of memory.
4 of 4
B2 B1 B0