PIC10F220-E/OT Microchip Technology, PIC10F220-E/OT Datasheet - Page 21

• Manufacturer Part Number: PIC10F220-E/OT
• Description: 384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG
• Manufacturer: Microchip Technology
• Series: PIC® 10Fr

Specifications of PIC10F220-E/OT

• Processor Series: PIC10F
• Core: RISC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 256 B
• Data Ram Size: 16 B
• Interface Type: RS-232, USB
• Maximum Clock Frequency: 8 MHZ
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23-6
• Operating Temperature Range: - 40 C to + 125 C
• Processor To Be Evaluated: PIC10F220
• Supply Current (max): 100 nA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: -
• Peripherals: POR, WDT
• Number Of I /o: 4
• Eeprom Size: -
• Ram Size: 16 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

4.7
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
mapped to PC<7:0>.
For a CALL instruction or any instruction where the PCL
is the destination, bits 7:0 of the PC again are provided
by the instruction word. However, PC<8> does not
come from the instruction word, but is always cleared
(Figure 4-5).
Instructions where the PCL is the destination or Modify
PCL instructions, include MOVWF PC, ADDWF PC and
BSF PC, 5.
FIGURE 4-5:
© 2007 Microchip Technology Inc.
CALL or Modify PCL Instruction
GOTO Instruction
Note:
Program Counter
Because PC<8> is cleared in the CALL
instruction or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any
program memory page (512 words long).
PC
PC
Reset to ‘0’
8 7
8 7
LOADING OF PC
BRANCH INSTRUCTIONS
Instruction Word
Instruction Word
PCL
PCL
0
0
4.7.1
The PC is set upon a Reset, which means that the PC
addresses the last location in program memory (i.e.,
the oscillator calibration instruction). After executing
MOVLW XX, the PC will roll over to location 0000h and
begin executing user code.
4.8
The PIC10F220 device has a 2-deep, 8-bit wide
hardware PUSH/POP stack.
The PIC10F222 device has a 2-deep, 9-bit wide
hardware PUSH/POP stack.
A CALL instruction will PUSH the current value of stack
1 into stack 2 and then PUSH the current PC value,
incremented by one, into stack level 1. If more than two
sequential CALL’s are executed, only the most recent
two return addresses are stored.
A RETLW instruction will POP the contents of stack level
1 into the PC and then copy stack level 2 contents into
level 1. If more than two sequential RETLW’s are exe-
cuted, the stack will be filled with the address
previously stored in level 2.
Note 1: The W register will be loaded with the lit-
2: There are no Status bits to indicate stack
3: There are no instructions mnemonics
Stack
EFFECTS OF RESET
eral value specified in the instruction. This
is particularly useful for the implementa-
tion of data look-up tables within the
program memory.
overflows or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the CALL
and RETLW instructions.
PIC10F220/222
DS41270E-page 19