DS1858E-050 Maxim Integrated Products, DS1858E-050 Datasheet - Page 18

IC RES TEMP 50/50K 3MON 16-TSSOP

DS1858E-050

Manufacturer Part Number
DS1858E-050
Description
IC RES TEMP 50/50K 3MON 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1858E-050

Taps
256
Resistance (ohms)
50K
Number Of Circuits
2
Temperature Coefficient
50 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 95°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resistance In Ohms
50K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
The direct-to-digital temperature sensor measures tem-
perature through the use of an on-chip temperature
measurement technique with an operating range from
-40°C to +102°C. Temperature conversions are initiated
upon power-up, and the most recent conversion is
stored in memory locations 60h and 61h of the Main
Device, which are updated every t
conversions do not occur during an active read or write
to memory.
The value of each resistor is determined by the tempera-
ture-addressed look-up table. The look-up table assigns
a unique value to each resistor for every 2°C increment
with a 1°C hysteresis at a temperature transition over the
operating temperature range (see Figure 4).
During power-up, the device is inactive until V
exceeds the digital power-on-reset voltage (POD). At this
voltage, the digital circuitry, which includes the 2-wire
interface, becomes functional. However, EEPROM
backed registers/settings cannot be internally read
(recalled into shadow SRAM) until V
log power-on-reset voltage (POA) at which time the
remainder of the device becomes fully functional. Once
V
Device memory is timed to go from a 1 to a 0 and indi-
cates when analog to digital conversions begin. If V
ever dips below POA, the RDYB bit will read as a 1 again.
Once a device exceeds POA and the EEPROM is
recalled, the values remain active (recalled) until V
below POD.
For 2-wire device addresses sourced from EEPROM
(ADFIX = 1), the device address defaults to A2h until
VCC exceeds POA and the EEPROM values are recalled.
The Auxiliary Device (A0h) is always available within this
voltage window (between POD and the EEPROM recall)
regardless of the programmed state of ADEN.
Furthermore, as the device powers-up, the V
flag (bit 4 of 70h in Main Device) will default to a 1 until
the first V
or clears the flag accordingly.
Clock and Data Transitions: The SDA pin is normally
pulled high with an external resistor or device. Data on
the SDA pin may only change during SCL-low time
periods. Data changes during SCL-high periods will
indicate a start or stop condition depending on the con-
ditions discussed below. See the timing diagrams in
Figures 5 and 6 for further details.
Dual Temperature-Controlled
Resistors with Three Monitors
18
CC
exceeds POA, the RDYB bit in byte 6Eh of the Main
____________________________________________________________________
Power-Up and Low-Voltage Operation
CC
analog-to-digital conversion occurs and sets
Temperature Conversion
2-Wire Operation
CC
frame
exceeds the ana-
. Temperature
CC
lo alarm
CC
falls
CC
CC
Start Condition: A high-to-low transition of SDA with
SCL high is a start condition, which must precede any
other command. See the timing diagrams in Figures 5
and 6 for further details.
Stop Condition: A low-to-high transition of SDA with
SCL high is a stop condition. After a read or write
sequence, the stop command places the DS1858 into a
low-power mode. See the timing diagrams in Figures 5
and 6 for further details.
Acknowledge: All address and data bytes are trans-
mitted through a serial protocol. The DS1858 pulls the
SDA line low during the ninth clock pulse to acknowl-
edge that it has received each word.
Standby Mode: The DS1858 features a low-power
mode that is automatically enabled after power-on,
after a stop command, and after the completion of all
internal operations.
Device Addressing: The DS1858 must receive an 8-bit
device address word following a start condition to
enable a specific device for a read or write operation.
The address word is clocked into this part’s MSB to
LSB. The address byte consists of Ah (1010) followed
by either A2h or the value in Table 01 8Ch for the Main
Device or A0h for the Auxiliary Device then the R/W bit.
This byte must match the address programmed into
Table 01 8Ch or A0h (for the Auxiliary Device). If a
device address match occurs, this part will output a
zero for one clock cycle as an acknowledge and the
corresponding block of memory is enabled (see the
Memory Organization section). If the R/W bit is high, a
read operation is initiated. If the R/W is low, a write
operation is initiated (see the Memory Organization
Figure 4. Look-Up Table Hysteresis
M6
M5
M4
M3
M2
M1
2
4
TEMPERATURE (°C)
TEMPERATURE
DECREASING
6
TEMPERATURE
INCREASING
8
10
12

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