CAT5409YI-00-T2 ON Semiconductor, CAT5409YI-00-T2 Datasheet - Page 11

• Manufacturer Part Number: CAT5409YI-00-T2
• Description: IC POT DPP QUAD 64TAP I2C 24TSSO
• Manufacturer: ON Semiconductor

Specifications of CAT5409YI-00-T2

• Taps: 64
• Resistance (ohms): 100K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resistance In Ohms: 100K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

illustrated in Figure 11. These three−byte instructions
exchange data between the WCR and one of the Data
Registers. The WCR controls the position of the wiper. The
response of the wiper to this action will be delayed by t
A transfer from the WCR (current wiper position), to a Data
Register is a write to non−volatile memory and takes a
minimum of t
between one of the four potentiometers and one of its
associated registers; or the transfer can occur between all
potentiometers and one associated register.
complete, as illustrated in Figure 10. These instructions
transfer data between the host/processor and the CAT5409;
either between the host and one of the data registers or
directly between the host and the Wiper Control Register.
These instructions are:
•
•
SDA
SDA
The basic sequence of the three byte instructions is
Four instructions require a two−byte sequence to
XFR Data Register to Wiper Control Register
This transfers the contents of one specified Data
Register to the associated Wiper Control Register.
XFR Wiper Control Register to Data Register
This transfers the contents of the specified Wiper
Control Register to the specified associated Data
Register.
R
S
T
A
T
R
S
T
A
T
ID3 ID2 ID1 ID0
ID3 ID2 ID1 ID0
0
0
Device ID
Device ID
WR
1
1
SDA
to complete. The transfer can occur
0
0
1
1
R
S
T
A
T
A3
A3
ID3 ID2 ID1 ID0
0
Address
A2 A1 A0 A
Internal
Device ID
Address
Figure 12. Increment/Decrement Instruction Sequence
A2 A1 A0
Internal
1
0
Figure 11. Three−Byte Instruction Sequence
Figure 10. Two−Byte Instruction Sequence
1
C
K
A3
C
A
K
I3 I2
A2
Address
Internal
Instruction
I3
Opcode
Instruction
http://onsemi.com
A1
Opcode
WRL
I2
I1 I0 R1 R0
A0 A
I1
.
C
K
11
Register
Address
I0
Data
I3
•
•
Increment/Decrement Command
and 12). The Increment/Decrement command is different
from the other commands. Once the command is issued and
the CAT5409 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in one
segment steps; thereby providing a fine tuning capability to
the host. For each SCL clock pulse (t
HIGH, the selected wiper will move one resistor segment
towards the R
pulse while SDA is LOW, the selected wiper will move one
resistor segment towards the R
Register
Address
R1
Instruction
Data
Opcode
The final command is Increment/Decrement (Figures 6
See Instructions format for more detail.
Global XFR Data Register to Wiper Control
Register
This transfers the contents of all specified Data
Registers to the associated Wiper Control Registers.
Global XFR Wiper Counter Register to Data
Register
This transfers the contents of all Wiper Control
Registers to the specified associated Data Registers.
I2
Pot/WCR
Address
R0 P1 P0 A
P1 P0 A
I1
Pot/WCR
Address
I0 R1 R0 P1
C
K
Register
Address
H
D7 D6 D5 D4 D3 D2 D1 D0
terminal. Similarly, for each SCL clock
C
K
N
C
1
I
Data Register D[7:0]
Pot/WCR
Address
P0
N
C
2
I
WCR[7:0]
A
C
K
L
or
terminal.
N
C
n
I
O
S
T
P
D
E
C
1
HIGH
) while SDA is
D
C
E
n
C
A
K
O
S
T
P
S
O
P
T