CAT5261YI-00-T2 ON Semiconductor, CAT5261YI-00-T2 Datasheet - Page 10

• Manufacturer Part Number: CAT5261YI-00-T2
• Description: IC POT DIG 100K 256T SPI 24TSSOP
• Manufacturer: ON Semiconductor

Specifications of CAT5261YI-00-T2

• Taps: 256
• Resistance (ohms): 100K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: SPI Serial
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Resistance In Ohms: 100K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

illustrated in Figure 7. These three−byte instructions
exchange data between the WCR and one of the Data
Registers. The WCR controls the position of the wiper. The
response of the wiper to this action will be delayed by t
A transfer from the WCR (current wiper position), to a Data
Register is a write to non−volatile memory and takes a
minimum of t
between one of the potentiometers and one of its associated
registers; or the transfer can occur between both
potentiometers and one associated register.
complete, as illustrated in Figure 6. These instructions
transfer data between the host/processor and the CAT5261;
either between the host and one of the data registers or
directly between the host and the Wiper Control Register.
These instructions are:
The basic sequence of the three byte instructions is
Four instructions require a two−byte sequence to
♦
♦
This transfers the contents of one specified Data
Register to the associated Wiper Control Register.
This transfers the contents of the specified Wiper
XFR Data Register to Wiper Control Register −
XFR Wiper Control Register to Data Register −
SI
SI
WR
ID3 ID2 ID1 ID0
ID3 ID2 ID1 ID0
0
0
Device ID
Device ID
to complete. The transfer can occur
1
1
0
0
SI
1
1
A3
0
A3
ID3 ID2 ID1 ID0
0
Figure 8. Increment/Decrement Instruction Sequence
0
Address
Internal
A2 A1 A0
Address
0
Internal
Device ID
A2 A1 A0
0
1
Figure 7. Three−Byte Instruction Sequence
Figure 6. Two−Byte Instruction Sequence
0
1
I3
A3
I3
Instruction
0
Opcode
I2 I1
Instruction
http://onsemi.com
A2
Address
Opcode
Internal
0
WRL
I2
A1
I1
.
I0 R1 R0
A0
10
I0
Register
Address
Data
Increment/Decrement Command
and 9). The Increment/Decrement command is different
from the other commands. Once the command is issued the
master can clock the selected wiper up and/or down in one
segment steps; thereby providing a fine tuning capability to
the host. For each SCK clock pulse (t
HIGH, the selected wiper will move one resistor segment
towards the R
pulse while SI is LOW, the selected wiper will move one
resistor segment towards the R
Register
Address
I3
R1
Instruction
Data
The final command is Increment/Decrement (Figures 8
See Instructions format for more detail.
♦
♦
Opcode
I2 I1
R0 P1 P0
Control Register to the specified associated Data
Register.
Register − This transfers the contents of all specified
Data Registers to the associated Wiper Control
Registers.
Register − This transfers the contents of all Wiper
Control Registers to the specified associated Data
Registers.
Global XFR Data Register to Wiper Control
Global XFR Wiper Counter Register to Data
P1 P0
Pot/WCR
Address
Pot/WCR
Address
I0 R1 R0 P1
D7 D6 D5 D4 D3 D2 D1 D0
H
Register
Address
terminal. Similarly, for each SCK clock
N
C
1
I
Data Register D[7:0]
N
C
2
I
Pot/WCR
WCR[7:0]
Address
P0
or
N
C
n
I
L
terminal.
D
C
E
1
HIGH
D
E
C
n
) while SI is