AD5233BRU10-REEL7 Analog Devices Inc, AD5233BRU10-REEL7 Datasheet - Page 20
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AD5233BRU10-REEL7
Manufacturer Part Number
AD5233BRU10-REEL7
Description
IC DGTL POT QUAD 64POS 24-TSSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5233BRUZ10-R7.pdf
(32 pages)
Specifications of AD5233BRU10-REEL7
Rohs Status
RoHS non-compliant
Taps
64
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
600 ppm/°C Typical
Memory Type
Non-Volatile
Interface
4-Wire SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Resistance In Ohms
10K
AD5233
Using Additional Internal Nonvolatile EEMEM
The AD5233 contains additional user EEMEM registers for
storing any 8-bit data. Table 9 provides an address map of the
internal storage registers shown in the functional block diagram
as EEMEM1, EEMEM2, and 11 bytes of user EEMEM.
Table 9. EEMEM Address Map
EEMEM Number
1
2
3
4
5
6
7
…
15
16
1
2
3
4
RDAC STRUCTURE
The patent-pending RDAC contains multiple strings of equal
resistor segments, with an array of analog switches that act as
the wiper connection. The number of positions is the resolution
of the device. The AD5233 has 64 connection points, allowing it
to provide better than 1.5% set ability resolution. Figure 43
shows an equivalent structure of the connections between the
three terminals of the RDAC. The SW
while the switches, SW(0) to SW(2
depending on the resistance position decoded from the data
bits. Because the switch is not ideal, there is a 15 Ω wiper
resistance, R
and temperature. The lower the supply voltage or the higher the
temperature, the higher the resulting wiper resistance. Users
should be aware of the wiper resistance dynamics if an accurate
prediction of the output resistance is needed.
O1 and O2 data stored in EEMEM locations is transferred to the corresponding
RDAC data stored in the EEMEM location is transferred to the RDAC register
at power-on, or when Instruction 1, Instruction 8, and PR are executed.
Execution of Instruction 1 leaves the device in the read mode power
consumption state. After the last Instruction 1 is executed, the user
should perform a NOP, Instruction 0, to return the device to the low
power idling state.
digital register at power-on, or when Instruction 1 and Instruction 8 are
executed.
USERx are internal nonvolatile EEMEM registers available to store and
retrieve constants and other 8-bit information using Instruction 3 and
Instruction 9, respectively.
W
. Wiper resistance is a function of supply voltage
Address
0000
0001
0010
0011
0100
0101
0110
…
1110
1111
N
−1), are on, one at a time,
A
and SW
EEMEM Content
RDAC1
RDAC2
RDAC3
RDAC4
O1 and O2
USER1
USER2
…
USER10
USER11
4
B
1, 2
1, 2
1, 2
1, 2
are always on,
3
Rev. B | Page 20 of 32
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between Terminal A
and Terminal B, R
with 64 positions (6-bit resolution). The final digit(s) of the part
number determine the nominal resistance value, for example,
10 = 10 kΩ; 50 = 50 kΩ; 100 = 100 kΩ.
The 6-bit data-word in the RDAC latch is decoded to select
one of the 64 possible settings. The following discussion
describes the calculation of resistance (R
of a 10 kΩ part. For V
starts at Terminal B for Data 0x00. R
the wiper resistance and because it is independent of the nominal
resistance. The second connection is the first tap point, where
R
connection is the next tap point, representing R
15 Ω = 327 Ω for Data 0x02, and so on. Each LSB data value
increase moves the wiper up the resistor ladder until the last
tap point is reached at R
simplified diagram of the equivalent RDAC circuit. When R
is used, Terminal A can be left floating or tied to the wiper.
WB
(1) becomes 156 Ω + 15 Ω = 171 Ω for Data 0x01. The third
100
75
50
25
0
0
Figure 44. R
DIGITAL
CIRCUITRY
OMITTED FOR
CLARITY
R
R
Figure 43. Equivalent RDAC Structure
REGISTER
S
DECODER
WA
AB
= R
WIPER
RDAC
AND
, is available with 10 kΩ, 50 kΩ, and 100 kΩ
16
AB
DD
WA
/2
WB
N
(D) and R
= 5 V, the wiper’s first connection
(63) = 9858 Ω. See Figure 43 for a
CODE (Decimal)
R
R
R
S
S
S
WB
32
SW(2
SW(2
(D) vs. Decimal Code
SW
SW
SW
SW
WB
N
N
(1)
(0)
A
B
– 1)
– 2)
(0) is 15 Ω because of
WB
) at different codes
W
A
B
48
R
WB
WB
(2) = 321 Ω +
6
4
WB