AD5260BRU200-REEL7 Analog Devices Inc, AD5260BRU200-REEL7 Datasheet - Page 17

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AD5260BRU200-REEL7

Manufacturer Part Number
AD5260BRU200-REEL7
Description
IC DGTL POT SNGL 256POS 14-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5260BRU200-REEL7

Rohs Status
RoHS non-compliant
Taps
256
Resistance (ohms)
200K
Number Of Circuits
1
Temperature Coefficient
35 ppm/°C Typical
Memory Type
Volatile
Interface
4-Wire SPI Serial
Voltage - Supply
4.5 V ~ 16.5 V, ±4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Resistance In Ohms
200K
Other names
AD5260BRU200REEL7
V
of R2B, an equilibrium will be reached such that V
can be in series with a discrete resistor to increase the amplitude,
but the total resistance cannot be too large to saturate the output.
In both circuits in Figures 21 and 22, the frequency tuning requires
that both RDACs be adjusted to the same settings. Since the two
channels will be adjusted one at a time, an intermediate state will
occur that may not be acceptable for certain applications. As a
result, different devices can also be used in daisy-chained mode so
that parts can be programmed to the same setting simultaneously.
Resistance Scaling
The AD5260/AD5262 offer 20 kW, 50 kW, and 200 kW nominal
resistance. For users who need lower resistance and still maintain the
numbers of step adjustment, they can parallel multiple devices. For
example, Figure 23 shows a simple scheme of paralleling both
channels of the AD5262. To adjust half of the resistance linearly
per step, users need to program both channels coherently with
the same settings.
In voltage divider mode, a much lower resistance can be achieved
by paralleling a discrete resistor as shown in Figure 24. The equiva-
lent resistance becomes:
REV. 0
O
, I
R
R
WB eq
WA eq
D
, and V
Figure 23. Reduce Resistance by Half with Linear
Adjustment Characteristics
_
_
Figure 22. Programmable Oscillator with
Amplitude Control
R1 = R1 = R2B = AD5262
D1 = D2 = 1N4148
2.2nF
=
=
Ê
Á
Ë
D
256
ADJUSTMENT
C
1
D
FREQUENCY
are interdependent variables. With proper selection
-
256
(
D
10k
R
1
R
AD5262
ˆ
˜
¯
B
A
§§
R
(
LD
A1
B1
R
2
1
W
1k
)
VN
R1
§§
+
V
R
DD
W1
R
VP
2
W
)
B
10k
W
R2B
OP1177
+
A2
B2
+5V
2.2nF
–5V
R
C
A
W
2.1k
W2
ADJUSTMENT
R2A
A
AMPLITUDE
U1
10k
W
R
B
D1
D2
O
converges. R2B
V
O
(16)
(17)
–17–
Figures 23 and 24 show that the digital potentiometers change steps
linearly. On the other hand, log taper adjustment is usually pre-
ferred in applications like audio control. Figure 25 shows another
way of resistance scaling. In this circuit, the smaller the R2 with
respect to R
RDAC CIRCUIT SIMULATION MODEL
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. Configured
as a potentiometer divider, the –3 dB bandwidth of the AD5260
(20 kW resistor) measures 310 kHz at half scale. TPC 20 provides
the large signal BODE plot characteristics of the three available
resistor versions 20 kW, 50 kW, and 200 kW. A parasitic simulation
model is shown in Figure 26. Listing I provides a macro model
net list for the 20 kW RDAC.
Figure 26. RDAC Circuit Simulation Model for RDAC = 20 k W
Listing I. Macro Model Net List for RDAC
PARAM D=256, RDAC=20E3
*
SUBCKT DPOT (A,W,B)
*
CA
RWA
CW
RWB
CB
*
.ENDS DPOT
Figure 25. Resistor Scaling with Log Adjustment
Characteristics
Figure 24. Lowering the Nominal Resistance
A
A
W
W
B
AB
, the more the pseudo-log taper characteristic behaves.
0
W
0
B
0
R1
25pF
A
R2
A
B
C
V
A
i
W
R2 << R1
RDAC
20k
25E-12
{(1-D/256)*RDAC+60}
55E-12
{D/256*RDAC+60}
25E-12
R2
W
R1
55pF
C
A
B
W
AD5260/AD5262
C
25pF
W
B
V
B
O

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