MCP4728-E/UN Microchip Technology, MCP4728-E/UN Datasheet
MCP4728-E/UN
Specifications of MCP4728-E/UN
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MCP4728-E/UN Summary of contents
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... The MCP4728 DAC is an ideal device for applications requiring design simplicity with high precision, and for applications requiring the DAC device settings to be saved during power-off time. The MCP4728 device is available in a 10-lead MSOP package and operates from a single 2.7V to 5.5V supply voltage serial interface = 2 ...
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... INPUT V SS REGISTER A EEPROM B INPUT REGISTER B SDA EEPROM C SCL INPUT REGISTER C EEPROM D INPUT RDY/BSY REGISTER D Internal V REF (2.048V) DS22187A-page 2 MSOP- SCL 2 OUT MCP4728 SDA 3 OUT 7 LDAC OUT RDY/BSY OUT LDAC V A UDAC REF Gain Control OUTPUT STRING DAC A REGISTER UDAC REF ...
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... 5.5V. REF command to the beginning of V MCP4728 = + 2.7V to 5.5V 0V SS. Conditions 5.5V REF DD DD All 4 channels are in normal mode. 3 channels are in normal mode, 1 channel is powered down. 2 channels are in normal mode, 2 channel are powered down ...
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... MCP4728 TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply kΩ 100 pF -40°C to +125°C. Typical values are at +25° Parameter Symbol Power-On-Reset V POR Threshold Voltage Power-Up Ramp Rate V RAMP DC Accuracy Resolution n INL Error INL DNL Error ...
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... 5.5V. REF command to the beginning of V MCP4728 = + 2.7V to 5.5V 0V SS. Conditions REF DD FSR = from 0. Internal, G =1, REF x FSR = from 0 REF V = Internal, G =2, ...
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... MCP4728 TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply kΩ 100 pF -40°C to +125°C. Typical values are at +25° Parameter Symbol Digital Interface Output Low Voltage V OL Schmitt Trigger V IL Low Input Threshold Voltage Schmitt Trigger ...
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... SU:STA T LOW T SDA HD:STA FSDA 2 FIGURE 1- Bus Timing Data. LDAC V (UDAC = 1) OUT No Update FIGURE 1-2: LDAC Pin Timing vs. V © 2009 Microchip Technology Inc. T HIGH T SU:DAT T HD:DAT LDAC 0.7V DD 0.3V DD Update Update. OUT MCP4728 T RSCL T SU:STO T BUF 0. RSDA DS22187A-page 7 ...
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... MCP4728 2 TABLE 1- SERIAL TIMING SPECIFICATIONS Electrical Specifications: Unless otherwise specified, all limits are specified for T Standard and Fast Mode: V High Speed Mode: V Parameters Sym Clock Frequency f SCL Bus Capacitive Loading Cb Start Condition Setup Time T SU:STA (Start, Repeated Start) Start Condition Hold Time ...
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... Clock Low time (T SU:DAT . specification. This specification is equivalent to the Data Hold Time ( = HD:DAT FSDA RSDA MCP4728 = 0V, SS Units Conditions ns Standard Mode ns Fast Mode ns High Speed Mode 1.7 High Speed Mode 1.7 (Note High Speed Mode 3.4 High Speed Mode 3.4 (Note 2) ...
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... MCP4728 TABLE 1-3: TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, V Parameters Symbol Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 10L-MSOP DS22187A-page 10 = +2.7V to +5.5V Min Typical Max Units T -40 — +125 ° -40 — ...
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... FIGURE 2- 0 REF DD 0.15 0.1 0.05 0 -0.05 -0.1 4096 0 = +25°C FIGURE 2- MCP4728 = 5 kΩ 100 pF 5.5V Internal, Gain = x1 DD REF 1024 2048 3072 4096 Code DNL vs. Code (T = +25° 5.5V Internal, Gain = x2 DD REF 1024 ...
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... MCP4728 Note: Unless otherwise indicated -40°C to +125° 2.7V Internal, Gain = x1 DD REF 1024 2048 3072 Code FIGURE 2-7: INL vs. Code ( 2.7V 1024 2048 3072 Code FIGURE 2-8: INL vs. Code ( 5.5V Internal, Gain = x1 DD REF 4 +85° +125 C -8 -10 0 1024 ...
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... C -0.3 4096 0 FIGURE 2-17: Temperature. 0 REF DD 0.3 0.2 0.1 0 -0.1 o +125 -0.2 0 4096 FIGURE 2-18: Temperature. MCP4728 = 5 kΩ 100 pF 5.5V Internal, Gain = x2 DD REF +85 C 1024 2048 3072 4096 Code DNL vs. Code and V = 2.7V Internal, Gain = 1X DD ...
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... MCP4728 Note: Unless otherwise indicated -40°C to +125° 2.7V VDD DD REF 125 1024 2048 3072 Code FIGURE 2-19: INL vs. Code and Temperature . - 2.7V, Gain = 5.5V, Gain = 1 DD -30 - 5.5V, Gain = 2 DD -50 -40 -25 - 110 125 o Temperature ( C) FIGURE 2-20: Full Scale Error vs. ...
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... Code Change: FFFh to 000h). V (2V/Div) V (2V/Div) OUT OUT Time (2/µs/Div LDAC FIGURE 2-30 Internal, V REF Code Change: FFFh to 000h). MCP4728 = 5 kΩ 100 pF Time (2/µs/Div Full Scale Settling Time , V = 5V, UDAC = 1, DD Time (2/µs/Div Half Scale Settling Time , V = 5V, UDAC = 1, DD Time (2/µ ...
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... MCP4728 Note: Unless otherwise indicated -40°C to +125° Time (2/µs/Div LDAC FIGURE 2-31: Half Scale Settling Time (V = Internal 5V, UDAC = 1, REF DD Code Change: 000h to 7FFh). Td ExPD Time (5/µs/Div CLK Last ACK CLK pulse FIGURE 2-32: Exiting Power Down Mode (Code : FFFh Internal, V ...
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... Code Change: 800h to 7FFh. FIGURE 2-41: Code Change Glitch (V = Internal, V REF DD Load), Code Change: 800h to 7FFh Load Resistance (kΩ) FIGURE 2-42: V MCP4728 = 100 pF (50 mV/Div) OUT Time (2/µs/Div = 5V, No External Load), V (50 mV/Div) OUT Time (2/µs/Div = 5V, Gain = 1, No External REF DD Code = FFFh ...
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... MCP4728 Note: Unless otherwise indicated -40°C to +125° 1000 All Channels 5.0V DD 800 3 Channels On 600 2 Channels On 400 200 1 Channel On 0 -40 -25 - 110 125 o Temperature ( C) FIGURE 2-43: I vs. Temperature 5V, Code = FFFh). DD REF DD 800 V = 2.7V DD All Channels On 600 3 Channels On 400 2 Channels On 200 1 Channel On ...
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... All Channels are in Powered REF , Down Current (mA) FIGURE 2-50: Source Current Capability ( Code = FFFh). REF DD © 2009 Microchip Technology Inc. = +5.0V 0V 110 125 FIGURE 2-51 REF DD Code = FFFh MCP4728 = 5 kΩ 100 pF Code = 000h Sink Current (mA) Sink Current Capability , Code = 000h). DS22187A-page 19 ...
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... MCP4728 NOTES: DS22187A-page 20 © 2009 Microchip Technology Inc. ...
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... If an analog ground path is available in the application PCB (printed circuit board highly recommended that the V pin be tied to the analog ground path or SS isolated within an analog ground plane of the circuit board. MCP4728 C address bits. (Note 2) line. (Note pin to a ground ...
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... SCL is the serial clock pin of the I C interface. The MCP4728 device acts only as a slave and the SCL pin accepts only external input serial clocks. The input data from the Master device is shifted into the SDA pin on the rising edges of the SCL clock and output from the MCP4728 occurs at the falling edges of the SCL clock ...
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... THEORY OF DEVICE OPERATION The MCP4728 device is a 12-bit 4-channel buffered voltage output DAC with non-volatile (EEPROM). The user can program the EEPROM with address bits, configuration and DAC input data of each channel. The device has an internal charge pump circuit to provide the programming voltage of the EEPROM ...
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... MCP4728 4.4 DAC Input Registers and Non-Volatile EEPROM Memory Each channel has its own volatile DAC input register and EEPROM. The details of the input registers and EEPROM are shown in Table 4-1 respectively. Configuration Bits Bit RDY REF Name /BSY 2 Bit I C Ref. ...
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... This is a status indicator (flag) of EEPROM programming activity EEPROM is not in programming mode 0 = EEPROM is in programming mode Note: RDY/BSY status can also be monitored at the RDY/BSY pin address bits. See Section 5.3 “MCP4728 Device Addressing” for more details. (A2, A1, A0) Device I V Voltage Reference Selection bit: ...
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... However, it stays turned on if any one of the channels selects the internal reference. 4.6 LSB Size The LSB is defined as the ideal voltage difference between two successive codes. LSB sizes of the MCP4728 device are shown in Table 4-4. TABLE 4-4: LSB SIZES (EXAMPLE) Gain (G ...
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... OUT TABLE 4-6: Nominal Output Voltage (V) Gain (See Note 1) Selection LSB Ignored REF 2 LSB REF LSB REF 2 LSB REF 2 LSB 2 LSB 1 LSB 1 LSB 0 0 MCP4728 DAC INPUT CODE VS. ANALOG OUTPUT (V ) OUT REF DD Nominal Output Voltage ( LSB LSB DD 2 LSB 1 LSB 0 DS22187A-page 27 ...
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... MCP4728 4.10 Normal and Power-Down Modes Each channel has two modes of operation: (a) Normal mode where analog voltage is available and (b) Power-Down mode which turns off most of the internal circuits for power savings. The user can select the operating mode of each channel individually by setting the Power-Down selection bits (PD1 and PD0) ...
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... The first byte transmitted is always the slave (MCP4728) address byte, which contains the device code (1100), the address bits (A2, A1, A0), and the R/W bit. The device code for the MCP4728 device is 1100, and the address bits are user-writable. When the MCP4728 device receives a read command (R/W = 1), it transmits the contents of the DAC input registers and EEPROM sequentially ...
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... The address byte is the first byte received following the START condition from the master device. The first part of the address byte consists of a 4-bit device code which is set to 1100 for the MCP4728 device. The 2 device code is followed by three I C address bits (A2, A1, A0) which are programmable by the users ...
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... Please refer to 2 the Philips I C document for more details of the General Call specifications. The MCP4728 device supports the following I General Calls: • General Call Reset • General Call Wake-Up • General Call Software Update • ...
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... Byte (General Call Command) Data (SDA Line) Note 1: At this falling edge of the last ACK clock bit, V updated. FIGURE 5-5: General Call Software Update. DS22187A-page the same ACK (MCP4728 2nd Byte (Command Type = General Call Software Update OUT OUT Stop ...
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... The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and (b) are not met. 3: LDAC pin resumes its normal function after “Stop” bit. ...
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... MCP4728 5.5 Writing and Reading Registers and EEPROM The Master (MCU) can write or read the DAC input registers or EEPROM using the I command. The following sections describe the communication examples to write and read the DAC registers and 2 EEPROM using the I C interface. ...
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... By sending the General Call Software Update command. Note 1: The UDAC bit can be used effectively to upload the input register to the output register, but it affects only a selected channel only, while the LDAC pin and General Call Software Update command affect all channels. MCP4728 Figure 5-8 DS22187A-page 35 ...
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... MCP4728 5.6.3 SEQUENTIAL WRITE COMMAND: WRITE DAC INPUT REGISTERS AND EEPROM SEQUENTIALLY FROM STARTING CHANNEL TO CHANNEL D (C2=0, C1=1, C0=0; W1=1, W0=0) When the device receives this command, it writes the input data to the DAC input registers sequentially from the starting channel to channel D, and also writes to EEPROM sequentially ...
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... If the R/W bit is set to a logic “High” in the I communications command, the device enters a reading mode and reads out the input registers and EEPROM. Figure 5-15 command. Note 1: The device address bits are read by using General command. MCP4728 address bits (A2, A1, Figure 5-11 command address bits. ...
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... Update Channel C DAC Input Register at this ACK pulse. Repeat Bytes can be updated after the last byte’s ACK pulse is issued and by OUT 3rd Byte ACK (MCP4728) 3rd Byte ACK (MCP4728) 3rd Byte ACK (MCP4728) 3rd Byte P Stop © 2009 Microchip Technology Inc. ...
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... ACK (MCP4728) 3rd Byte PD1 PD0 Gx D11 D10 REF DAC Input Register of Selected Channel Repeat Bytes of the 2nd - 4th Bytes ACK (MCP4728) 3rd Byte PD1 PD0 Gx D11 D10 REF DAC Input Register of Selected Channel Repeat Bytes of the 2nd - 4th Bytes is updated after the 4th byte’s ACK is issued. ...
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... OUT If UDAC = 0 or LDAC Pin = EEPROM Write: The MCP4728 device starts writing EEPROM at the falling edge of the 4th byte’s ACK pulse. FIGURE 5-9: Sequential Write Command: Write DAC Input Registers and EEPROM Sequentially from Starting Channel to Channel D. Note that this command can send bytes including the device addressing and command bytes ...
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... Update: OUT If UDAC = 0 or LDAC Pin = EEPROM Write: The MCP4728 device starts writing EEPROM at the falling edge of the 4th byte’s ACK pulse. FIGURE 5-10: Single Write Command: Write to a Single DAC Input Register and EEPROM. © 2009 Microchip Technology Inc. ...
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... The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and (b) are not met. 3: LDAC pin resumes its normal function after “Stop” bit. ...
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... C1 C0) 2nd Byte REF R/W Write Command Registers and V at this falling edge of ACK pulse. C0=1 A ACK (MCP4728) PD1 C PD0 C PD1 D Channel B Channel C Channel D Registers and V at this falling edge of ACK pulse. MCP4728 Stop REF REF REF Note 1 are updated ...
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... Gain Selection for Channel Gain Selection for Channel Gain of 1 for Channel Gain of 2 for Channel don’t care bit. FIGURE 5-14: Write Command: Write Gain Selection Bit (G DS22187A-page 44 C0=0 ACK (MCP4728) ( R/W Write Command Registers and V at this falling edge of ACK pulse. ...
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... Note 1: The 2nd - 4th bytes are the contents of the DAC Input Register and the 5th - 7th bytes are the EEPROM contents. The device outputs sequentially from channel POR Bit Set (Device is powered on with V FIGURE 5-15: Read Command and Device Outputs. © 2009 Microchip Technology Inc. ACK (MCP4728) A ACK (MCP4728) 3rd Byte V PD1 PD0 G D11 D10 ...
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... MCP4728 NOTES: DS22187A-page 46 © 2009 Microchip Technology Inc. ...
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... Integral Nonlinearity (INL) Integral nonlinearity (INL) error is the maximum deviation of an actual transfer function from an ideal transfer function (straight line). In the MCP4728, INL is calculated using two end-points (zero and full scale). INL can be expressed as a percentage of full scale range (FSR fraction of an LSB. INL is also called relative accuracy ...
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... The gain error is usually expressed as percent of full scale range (% of FSR LSB. DS22187A-page 48 For the MCP4728 device, the gain error is not calibrated at the factory and most of the gain error is contributed by the output buffer (op amp) saturation near the code range beyond 4000. For applications that ...
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... In the MCP4728 device, the settling time is a measure of the time delay until the DAC output reaches its final value within 0.5 LSB when the DAC code changes from 400h to C00h ...
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... MCP4728 NOTES: DS22187A-page 50 © 2009 Microchip Technology Inc. ...
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... Microchip Technology Inc. 7.1 Connecting to I Pull-Up Resistors The SCL, SDA, and RDY/BSY pins of the MCP4728 device are open-drain configurations. These pins require a pull-up resistor as shown in LDAC pin has a schmitt trigger input configuration and it can be driven by an external MCU I/O pin. ...
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... MCP4728 7.1.1 DEVICE CONNECTION TEST The user can test the presence of the MCP4728 device 2 on the I C bus line without performing a data conversion. This test can be achieved by checking an acknowledge response from the MCP4728 device after sending a read or write command. Figure 7-2 example with a read command: a ...
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... Microchip Technology Inc. MCP4728 7.6.1 DC SET POINT OR CALIBRATION VOLTAGE SETTINGS A common application for the MCP4728 device is a digitally-controlled set point or a calibration of variable parameters such as sensor offset or bias point. Figure 7-3 shows an example of the set point settings. Let us consider that the application requires different trip voltages (Trip 1 - Trip 4) ...
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... Input Code (0 to 4095 × n ----------- - OUT REF x 4096 R ⎛ ⎞ 2 ------------------ - ⎝ ⎠ TRIP OUT FIGURE 7-3: Using the MCP4728 for Set Point or Threshold Calibration. DS22187A-page 54 Light Light V DD 0.1 ¬µ 10 ¬µ OUT OUT OUT Light OUT Analog Outputs To MCU Light ...
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... 4096 4096 D 2048 × n × ----------- - × 2 ----------- - G = 2.048 = REF x 4096 4096 D 4095 × n × ----------- - × 2 ----------- - G = 2.048 = REF x 4096 4096 MCP4728 2048 ACK (MCP4728 4095 ACK (MCP4728 2048 ACK (MCP4728) Stop Dn = 4095 – LSB 2.048 4.096 Figure 7-3. DS22187A-page 55 ...
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... MCP4728 Start 1st Byte Address Byte Fast Mode Write Command The following example shows the expected analog outputs with the corresponding DAC input codes: DAC A Input Code = DAC B Input Code = DAC C Input Code = DAC D Input Code = ( V REF V OUT = --------------------------------- - G x 4096 (A) Channel A Output: ...
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... DEVELOPMENT SUPPORT 8.1 Evaluation & Demonstration Boards The MCP4728 Evaluation Board is available from Microchip Technology Inc. This board works with Micro- chip’s PICkit™ Serial Analyzer. The user can easily program the DAC input registers and EEPROM using the PICkit Serial Analyzer, and test out the DAC analog output voltages ...
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... MCP4728 NOTES: DS22187A-page 58 © 2009 Microchip Technology Inc. ...
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... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2009 Microchip Technology Inc. MCP4728 Example 4728 906256 e ) ...
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... MCP4728 /HDG 3ODVWLF 0LFUR 6PDOO 2XWOLQH 3DFNDJH 81 >0623@ 1RWH 1RWHV DS22187A-page 60 I © 2009 Microchip Technology Inc. φ ...
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... APPENDIX A: REVISION HISTORY Revision A (June 2009) • Original Release of this Document. © 2009 Microchip Technology Inc. MCP4728 DS22187A-page 61 ...
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... MCP4728 NOTES: DS22187A-page 62 © 2009 Microchip Technology Inc. ...
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... To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office PART NO. X /XX ‚ Device Temperature Package Range Device: MCP4728: Single Comparator = -40 ° +125 ° C Temperature Range: E Package Plastic Micro Small Outline Transistor, 10-lead © 2009 Microchip Technology Inc. MCP4728 . Examples: a) MCP4728: Tape and Reel, Extended Temperature, 10LD MSOP package. DS22187A-page 63 ...
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... MCP4728 NOTES: DS22187A-page 64 © 2009 Microchip Technology Inc. ...
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... PICDEM, PICDEM.net, PICtail, PIC Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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