LTC1650IS#PBF Linear Technology, LTC1650IS#PBF Datasheet - Page 4
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LTC1650IS#PBF
Manufacturer Part Number
LTC1650IS#PBF
Description
IC D/A CONV 16BIT R-R 16-SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1650ISPBF.pdf
(12 pages)
Specifications of LTC1650IS#PBF
Settling Time
4µs
Number Of Bits
16
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Dual ±
Power Dissipation (max)
50mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Number Of Channels
1
Resolution
16b
Interface Type
SERIAL 3W SPI UW
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±5V
Power Supply Requirement
Dual
Output Type
Voltage
Integral Nonlinearity Error
±16LSB
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±4.75V
Dual Supply Voltage (max)
±5.25V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
ELECTRICAL CHARACTERISTICS
LTC1650
temperature range, otherwise specifications are at T
5.25V, REFLO = 0V, REFHI = 4.096V, V
SYMBOL
Digital I/O Characteristics
V
V
V
V
I
C
Reset Characteristics
R
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Nonlinearity is defined from code 0 to code 65535 (full scale)
(end point INL, see Definitions section).
Note 3: Guaranteed by design. Not subject to test.
Note 4: To 1LSB. Unipolar mode. DAC switched between all 1s and all 0s.
4
LK
1
2
3
4
5
6
7
8
9
10
IH
IL
OH
OL
IN
ON
PARAMETER
Digital Input High Voltage
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
Digital Input Leakage
Digital Input Capacitance
V
Threshold Voltage for Reset
D
D
CLK High Time
CLK Low Time
CS/LD Pulse Width
LSB CLK to CS/LD
CS/LD Low to CLK
D
CLK Low to CS/LD Low
CLR Pulse Width
OUT
IN
IN
OUT
Valid to CLK Setup
Valid to CLK Hold
and V
Output Delay
RST
Switch Resistance
OUT
unloaded, unless otherwise noted.
A
CONDITIONS
I
I
V
(Note 3)
V
AV
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
C
(Note 3)
OUT
OUT
IN
RST
AV
LOAD
= 25 C. AV
DD
= GND to V
SS
= –1mA, D
= 1mA, D
= 0.5V (Note 7)
or DV
= 100pF
The
(Note 8)
DD
DD
denotes specifications which apply over the full operating
OUT
(Note 8)
CC
OUT
= 4.75V to 5.25V, AV
Only
Note 5: Digital Inputs at 0V or DV
Note 6: Measured at V
Note 7: When part powers up or when it is reset, the output is connected
to V
Note 8: Reset is active when any supply goes below this threshold.
Note 9: REFLO = 0V, REFHI = V
Only
RST
through this switch.
SS
OUT
= – 4.75V to – 5.25V, DV
. REFHI = REFLO = 0V, unipolar mode.
REF
DD
V
. For REFLO 0V see Operation section.
CC
.
MIN
2.4
1.5
1.5
40
40
40
50
40
20
20
50
0
5
– 1.0
TYP
200
2.5
2.5
45
DD
= 4.75V to
MAX
500
150
0.8
0.4
3.2
3.2
10
10
UNITS
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
A
V
V