CS4335-KSZ Cirrus Logic Inc, CS4335-KSZ Datasheet - Page 15
![IC DAC STER 24BIT 96KHZ 8-SOIC](/photos/6/68/66828/cs4335-ksz_sml.jpg)
CS4335-KSZ
Manufacturer Part Number
CS4335-KSZ
Description
IC DAC STER 24BIT 96KHZ 8-SOIC
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS4334-KSZ.pdf
(24 pages)
Specifications of CS4335-KSZ
Number Of Converters
2
Package / Case
8-SOIC
Number Of Bits
24
Data Interface
Serial
Voltage Supply Source
Single Supply
Power Dissipation (max)
104mW
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Number Of Dac Outputs
2
Conversion Rate
96 KSPS
Resolution
24 bit
Interface Type
Serial
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
104 mW
Minimum Operating Temperature
- 10 C
Supply Current
15 mA
Resolution (bits)
24bit
Input Channel Type
Serial
Digital Ic Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-10°C To +70°C
Supply Voltage Range
4.75V To 5.5V
Rohs Compliant
Yes
Dc
0614
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1047-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS4335-KSZ
Manufacturer:
CIRRUS
Quantity:
150
Part Number:
CS4335-KSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
CS4335-KSZR
Manufacturer:
CIRRUSLOGIC
Quantity:
2 440
Part Number:
CS4335-KSZR
Manufacturer:
CIRRUS
Quantity:
20 000
DS248F5
4.6
4.7
S D A T A
S D A T A
I²S, 16-Bit data and INT SCLK = 32 Fs if
MCLK/LRCK = 512, 256 or 128
I²S, Up to 24-Bit data and INT SCLK = 48 Fs if
MCLK/LRCK = 384 or 192
Left Justified, up to 24-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
LR C K
LR C K
S C L K
S C L K
down state is related to the value of the DC-blocking capacitance. For example, with a 3.3 µF capacitor, the
time that the device must remain in the power-down state will be approximately 0.4 seconds.
Grounding and Power Supply Decoupling
As with any high resolution converter, the CS4334 family requires careful attention to power supply and
grounding arrangements to optimize performance. Figure
with VA connected to a clean +5V supply. For best performance, decoupling capacitors should be located
as close to the device package as possible with the smallest capacitor closest.
Analog Output and Filtering
The analog filter present in the CS4334 family is a switched-capacitor filter followed by a continuous time
low pass filter. Its response, combined with that of the digital interpolator, is given in
MSB -1 -2 -3 -4 -5
M SB -1 -2 -3 -4 -5
Internal SCLK Mode
Internal SCLK Mode
Le ft C ha n nel
+5 +4
Le ft C ha n nel
+5 +4
+3 +2 +1 LSB
+3 +2 +1 LS B
Figure 10. CS4334 Data Format (I²S)
Figure 11. CS4335 Data Format
Confidential Draft
3/11/08
I²S, up to 24-Bit Data
Data Valid on Rising Edge of SCLK
Left Justified, up to 24-Bit Data
Data Valid on Rising Edge of SCLK
M SB -1 -2 -3 -4
MSB -1 -2 -3 -4
1
shows the recommended power arrangement
External SCLK Mode
External SCLK Mode
+5 +4
+5 +4
R ig h t C ha n nel
R ig h t C ha n nel
+3 +2 +1 LSB
+3 +2 +1 LS B
Figures 15
CS4334/5/8/9
- 22.
15