AD5301BRMZ Analog Devices Inc, AD5301BRMZ Datasheet - Page 17
![IC DAC 8BIT 2WIRE I2C 8-MSOP](/photos/1/38/13894/rm-8_sml.jpg)
AD5301BRMZ
Manufacturer Part Number
AD5301BRMZ
Description
IC DAC 8BIT 2WIRE I2C 8-MSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5301BRTZ-500RL7.pdf
(24 pages)
Specifications of AD5301BRMZ
Data Interface
I²C, Serial
Settling Time
6µs
Number Of Bits
8
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.4mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resolution (bits)
8bit
Sampling Rate
167kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
2.5V To 5.5V
Supply Current
150µA
Digital Ic Case Style
SOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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POWER-DOWN MODES
The AD5301/AD5311/AD5321 have very low power consump-
tion, dissipating typically 0.36 mW with a 3 V supply and 0.75 mW
with a 5 V supply. Power consumption can be further reduced
when the DAC is not in use by putting it into one of three
power-down modes, which are selected by Bit 13 and Bit 12 (PD1
and PD0) of the control word. Table 6 shows how the state of
the bits corresponds to the mode of operation of the DAC.
Table 6. PD1 and PD0 Operating Modes
PD1
0
0
1
1
The software power-down modes programmed by PD1 and
PD0 may be overridden by the PD pin on the 8-lead version.
Taking this pin low puts the DAC into three-state power-down
mode. If PD is not used, tie it high.
When both bits are set to 0, the DAC works normally with its
normal power consumption of 150 μA at 5 V, while for the three
power-down modes, the supply current falls to 200 nA at 5 V
(50 nA at 3 V). Not only does the supply current drop, but the
PD0
0
1
0
1
Operating Mode
Normal operation
Power-down (1 kΩ load to GND)
Power-down (100 kΩ load to GND)
Power-down (three-state output)
Rev. B | Page 17 of 24
output stage is also internally switched from the output of the
amplifier to a resistor network of known values. This has the
advantage that the output impedance of the part is known while
the part is in power-down mode and provides a defined input
condition for whatever is connected to the output of the DAC
amplifier. There are three different options. The output is con-
nected internally to GND through a 1 kΩ resistor, a 100 kΩ
resistor, or it is left three-stated. Resistor tolerance = ±20%.
The output stage is illustrated in Figure 35.
The bias generator, the output amplifier, the resistor string, and
all other associated linear circuitry are shut down when the
power-down mode is activated. However, the contents of the
DAC register are unchanged when in power-down. The time to
exit power-down is typically 2.5 μs for V
V
DD
= 3 V (see Figure 21).
STRING DAC
REGISTER
Figure 35. Output Stage During Power-Down
POWER-DOWN
CIRCUITRY
AD5301/AD5311/AD5321
AMPLIFIER
RESISTOR
NETWORK
DD
= 5 V and 6 μs when
V
OUT