AD5410AREZ Analog Devices Inc, AD5410AREZ Datasheet - Page 25
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AD5410AREZ
Manufacturer Part Number
AD5410AREZ
Description
IC DAC 12BIT 1CH SER 24TSSOP
Manufacturer
Analog Devices Inc
Datasheet
1.AD5410AREZ.pdf
(28 pages)
Specifications of AD5410AREZ
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Simplified 12-Bit, 4 mA-to-20 mA Output Solution Using AD5410 (CN0081)
Settling Time
40µs
Number Of Bits
12
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
950mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Resolution (bits)
12bit
Input Channel Type
Serial
Supply Voltage Range - Digital
2.7V To 5.5V
Supply Current
4mA
Digital Ic Case Style
TSSOP
No. Of Pins
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5410AREZ
Manufacturer:
ADI
Quantity:
3 000
Part Number:
AD5410AREZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5410AREZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
APPLICATIONS INFORMATION
DRIVING INDUCTIVE LOADS
When driving inductive or poorly defined loads, connect a 0.01 μF
capacitor between I
loads beyond 50 mH. There is no maximum capacitance limit.
The capacitive component of the load may cause slower settling.
Alternatively, the capacitor can be connected from CAP1 and/or
CAP2 to AV
slew rate control feature may also prove useful in this situation.
TRANSIENT VOLTAGE PROTECTION
The AD5410/AD5420 contain ESD protection diodes that prevent
damage from normal handling. The industrial control environ-
ment can, however, subject I/O circuits to much higher transients.
To protect the AD5410/AD5420 from excessively high voltage
transients, external power diodes and a surge current limiting
resistor may be required, as shown in Figure 49. The constraint
on the resistor value is that during normal operation, the output
level at I
AV
have appropriate power ratings. Further protection can be pro-
vided with transient voltage suppressors (TVS), or transorbs.
These are available as both unidirectional suppressors (protect
against positive high voltage transients) and bidirectional
suppressors (protect against both positive and negative high
voltage transients) and are available in a wide range of standoff
and breakdown voltage ratings. It is recommended that all field
connected nodes be protected.
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board (PCB) on
which the AD5410/AD5420 are mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD5410/AD5420 are in a
system where multiple devices require an AGND-to-DGND
connection, the connection should be made at one point only.
The star ground point should be established as close as possible
to the device.
The AD5410/AD5420 should have ample supply bypassing of
10 μF in parallel with 0.1 μF on each supply, located as close to
the package as possible, ideally right up against the device.
The 10 μF capacitors are the tantalum bead type. The 0.1 μF
DD
− 2.5 V, and the two protection diodes and resistor must
OUT
must remain within its voltage compliance limit of
DD
Figure 49. Output Transient Voltage Protection
AD5410/
AD5420
to reduce the slew rate of the current. The digital
AV
AV
GND
DD
DD
OUT
I
and GND. This ensures stability with
OUT
R
P
R
L
Rev. B | Page 25 of 28
capacitor should have low effective series resistance (ESR)
and low effective series inductance (ESI), such as the common
ceramic types, which provide a low impedance path to ground
at high frequencies to handle transient currents due to internal
logic switching.
The power supply lines of the AD5410/AD5420 should use as
large a trace as possible to provide low impedance paths and to
reduce the effects of glitches on the power supply line. Fast-
switching signals such as clocks should be shielded with digital
ground to avoid radiating noise to other parts of the board and
should never be run near the reference inputs. A ground line
routed between the SDIN and SCLK lines helps reduce crosstalk
between them (not required on a multilayer board that has a
separate ground plane, but separating the lines helps). It is
essential to minimize noise on the REFIN line because noise
can couple through to the DAC output.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough on the board.
A microstrip technique is by far the best method but is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to the ground
plane, and signal traces are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
i Coupler® family of products from Analog Devices, Inc.,
provides voltage isolation in excess of 2.5 kV. The serial loading
structure of the AD5410/AD5420 is ideal for isolated interfaces
because the number of interface lines is kept to a minimum.
Figure 50 shows a 4-channel isolated interface to the AD5410/
AD5420 using an ADuM1400. For further information, visit
www.analog.com/icouplers.
CONTROLLER
*ADDITIONAL PINS OMITTED FOR CLARITY.
CONTROL
SERIAL
SERIAL
CLOCK
SYNC
DATA
OUT
OUT
OUT
OUT
V
V
V
V
IA
IB
IC
ID
Figure 50. Isolated Interface
ENCODE
ENCODE
ENCODE
ENCODE
ADuM1400*
DECODE
DECODE
DECODE
DECODE
AD5410/AD5420
V
V
V
V
OA
OB
OC
OD
TO
SCLK
TO
SDIN
TO
LATCH
TO
CLEAR