MAX5381LEUK+T Maxim Integrated Products, MAX5381LEUK+T Datasheet - Page 9

IC DAC 8BIT 2WIRE SER SOT23-5

MAX5381LEUK+T

Manufacturer Part Number
MAX5381LEUK+T
Description
IC DAC 8BIT 2WIRE SER SOT23-5
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5381LEUK+T

Settling Time
20µs
Number Of Bits
8
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
571mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-5, SC-74A, SOT-25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MAX5381LEUK+T
The MAX5380/MAX5381/MAX5382 have a power-on
reset circuit to set the DAC’s output to 0 when V
first applied or when V
ensures that unwanted DAC output voltages will not
occur immediately following a system startup, such as
Figure 3. 2-Wire Serial Interface Timing Diagram
Figure 4. Typical Application Circuit
R
*R
SDA
SCL
S
*
S
IS OPTIONAL.
SDA
t
HD: STA
START CONDITION
µC
SCL
SCL
SDA
SCL
SDA
SCL
SDA
V
2V REFERENCE
4V REFERENCE
DD
MAX5380M
MAX5381N
_______________________________________________________________________________________
MAX5382P
REFERENCE
t
LOW
Low-Cost, Low-Power, 8-Bit DACs with
DD
V
OUT
V
OUT
V
OUT
t
R
DD
DD
DD
dips below 1.7V (typ). This
t
SU: DAT
t
HIGH
V
t
DD
F
GAIN ADJUSTMENT
OFFSET ADJUSTMENT
THRESHOLD ADJUSTMENT
2-Wire Serial Interface in SOT23
Power-On Reset
t
HD: DAT
DD
t
SU: STA
REPEATED START CONDITION
is
after a loss of power. The output glitch at startup is typi-
cally less than 50mV.
The MAX5380/MAX5381/MAX5382 include a software-
controlled shutdown mode that reduces the supply cur-
rent to <1µA. All internal circuitry is disabled, and an
internal 10kΩ resistor is placed from OUT to GND to
ensure 0V at OUT while in shutdown. The device enters
shutdown in less than 5µs and exits shutdown in less
than 50µs.
The MAX5380/MAX5381/MAX5382 use a simple 2-wire
serial interface requiring only two I/O lines (2-wire bus)
of a standard microprocessor (µP) port. Figure 3 shows
the timing diagram for signals on the 2-wire bus.
The two bus lines (SDA and SCL) must be high when
the bus is not in use. The MAX5380/MAX5381/
MAX5382 are receive-only devices (slaves) and must
be controlled by a bus master device. Figure 4 shows a
typical application where up to four devices can be
connected to the bus, provided they have different
address settings. External pull-up resistors are not nec-
essary on these lines (when driven by push-pull dri-
vers), though these DACs can be used in applications
where pull-up resistors are required (such as in I
systems) to maintain compatibility with existing circuit-
ry. The serial interface operates at SCL rates up to
400kHz. The SDA state is allowed to change only while
SCL is low, with the exception of START and STOP con-
ditions as shown in Figure 5. Each transmission con-
sists of a START condition sent by the bus master
t
HD: STA
t
SU: STO
STOP CONDITION
Digital Section
Shutdown Mode
Serial Interface
t
BUF
START CONDITION
2
C
9

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