MAX5822MEUA+ Maxim Integrated Products, MAX5822MEUA+ Datasheet - Page 10

• Manufacturer Part Number: MAX5822MEUA+
• Description: IC DAC 12BIT DL 2WIRE SER 8-UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX5822MEUA+

• Settling Time: 4µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Number Of Dac Outputs: 2
• Resolution: 12 bit
• Interface Type: Serial (I2C)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 215 uA
• Voltage Reference: External
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

(Figure 7). Setting bits A or B to 1 sets that DAC to the
selected power-down mode based on the states of PD0
and PD1 (Table 1). Any combination of the DACs can
be controlled with a single write sequence.
In read mode (R/W = 1), the MAX5822 writes the con-
tents of the DAC register to the bus. The direction of
data flow reverses following the address acknowledge
by the MAX5822. The device transmits the first byte of
data, waits for the master to acknowledge, then trans-
mits the second byte. Figure 8 shows an example-read
data sequence.
The MAX5822 is compatible with existing I
SCL and SDA are high-impedance inputs; SDA has an
open drain that pulls the data line low during the ninth
clock pulse. The Typical Operating Circuit shows a typi-
cal I
ports the standard I
general call address is ignored. The MAX5822 address
is compatible with the 7-bit I
only. No 10-bit address formats are supported.
When the MAX5822 detects an address mismatch, the
serial interface disconnects the SCL signal from the
core circuitry. This minimizes digital feedthrough
Dual, 12-Bit, Low-Power, 2-Wire, Serial
Voltage-Output DAC
Figure 6. Example Write-Command Sequences
10
2
______________________________________________________________________________________
C application. The communication protocol sup-
MSB
MSB
S
S
Digital Feedthrough Suppression
A6
A6
MSB
MSB
D7
A5
A5
X
2
C 8-bit communications. The
D6
A4
A4
X
D5
A3
A3
X
2
C addressing protocol
D4
A2
A2
X
EXAMPLE-WRITE TO POWER-DOWN REGISTER SEQUENCE
Read Data Format
I
2
D3
A1
A1
C Compatibility
B
EXAMPLE-WRITE DATA SEQUENCE
2
D2
A0
A0
A
C systems.
PD1
LSB
LSB
R/W
R/W
D1
PD0
LSB
LSB
D0
ACK
ACK
ACK
ACK
MSB
MSB
C3
C3
caused by the SCL signal on a static output. The serial
interface reconnects the SCL signal once a valid
START condition is detected.
The MAX5822 2-wire digital interface is I
compatible. The two digital inputs (SCL and SDA) load
the digital input serially into the DAC. Schmitt-trigger
buffered inputs allow slow-transition interfaces, such as
optocouplers to interface directly to the device. The
digital inputs are compatible with CMOS logic levels.
Careful PC board layout is important for optimal system
performance. Keep analog and digital signals separate
to reduce noise injection and digital feedthrough. Use a
ground plane to ensure that the ground return from
GND to the power-supply ground is short and low
impedance. Bypass V
ground as close to the device as possible.
Figure 7. Extended Command Byte Format
C2
C2
P
P
C1
C1
X
Digital Inputs and Interface Logic
C0
C0
X
Applications Information
D11
D11
Power-Supply Bypassing and
X
D10
D10
DD
X
with a 0.1µF capacitor to
D9
D9
Ground Management
B
LSB
LSB
D8
D8
A
ACK
ACK
PD1
PD0
2
C/SMBus