CS4354-CSZ Cirrus Logic Inc, CS4354-CSZ Datasheet - Page 8

IC DAC 24BIT SRL 14SOIC

CS4354-CSZ

Manufacturer Part Number
CS4354-CSZ
Description
IC DAC 24BIT SRL 14SOIC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS4354-CSZ

Package / Case
14-SOIC (3.9mm Width), 14-SOL
Number Of Bits
24
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
65mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Conversion Rate
192 Ksps
Resolution
24 bit
Interface Type
Serial
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 85 C
Maximum Power Dissipation
65 mW
Mounting Style
SMD/SMT
Number Of Dac Outputs
2
Number Of Dacs
2
Output Voltage
5 V
Power Consumption
50 mW
Supply Current
5 V
Thd Plus Noise
- 86 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1808
CS4354-CSZ

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8
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE
MCLK Frequency
MCLK Duty Cycle
Input Sample Rate
(Note 12)
External SCLK Mode
LRCK Duty Cycle
SCLK Pulse Width Low
SCLK Pulse Width High
SCLK Duty Cycle
SCLK rising to LRCK edge delay
LRCK edge to SCLK rising delay
SDIN valid to SCLK rising setup time
SCLK rising to SDIN hold time
Internal SCLK Mode
LRCK Duty Cycle
SCLK Period
MCLK falling to LRCK edge
LRCK edge to SCLK rising
SDIN valid to SCLK rising setup time
SCLK rising to SDIN hold time
12. Not all sample rates are supported for all clock ratios. See
13. SCLK period is defined by the SCLK / LRCK ratio. The SCLK / LRCK ratio may be either 32, 48, or 64.
14.
t
Mode Detect” on page 13
DSM = Double-Speed Mode, QSM = Quad-Speed Mode.
See
sclkr
Table 5 on page
=
(SSM) 256x, 384x, 512x, 768x, 1024x
t
-----------------
MCLK / LRCK = 1024, 512, 256, 128
Parameters
(DSM) 128x, 192x, 256x, 384x, 512x
sclkw
2
All MCLK/LRCK ratios combined
MCLK / LRCK = 768, 384, 192
+
-------------------------- -
2 MCLK
10
(QSM) 128x, 192x, 256x
14.
9
+
t
mclkf
for supported ratios and frequencies. SSM = Single-Speed Mode,
(Note 13)
Symbol
t
t
t
t
t
t
t
sclkw
sclkh
t
t
mclkf
t
t
sdlrs
sdlrs
sclkl
sclkr
Fs
slrd
sdh
sdh
slrs
50%
---------------------- -
512
---------------------- -
512 Fs
---------------------- -
384
-------------------------- -
4 MCLK
10
10
10
--------------- -
SCLK
Section 4.2 “Sample Rate Range/Operational
Min
170
10
9
9
7.6
--------------------------- -
2
9
45
30
30
84
45
20
20
45
20
20
20
20
10
Fs
Fs
-
9
9
MCLK
+
1
+
+
15
10
15
(Note 14)
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
50%
-------------------------- -
4 MCLK
+
10
Max
55.3
216
108
216
--------------------------- -
2
55
54
55
55
-
-
-
-
-
-
-
9
-
-
-
-
MCLK
1
CS4354
DS895A2
Units
MHz
kHz
kHz
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
-

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